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-rw-r--r--src/mainboard/google/rex/variants/baseboard/rex/ramstage.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/src/mainboard/google/rex/variants/baseboard/rex/ramstage.c b/src/mainboard/google/rex/variants/baseboard/rex/ramstage.c
index f33db733fa..d2adaaee52 100644
--- a/src/mainboard/google/rex/variants/baseboard/rex/ramstage.c
+++ b/src/mainboard/google/rex/variants/baseboard/rex/ramstage.c
@@ -20,6 +20,15 @@ const struct cpu_tdp_power_limits performance_efficient_limits[] = {
.pl2_max_power = 57000,
.pl4_power = 114000
},
+ {
+ .mch_id = PCI_DID_INTEL_MTL_P_ID_5,
+ .cpu_tdp = 15,
+ .pl1_min_power = 10000,
+ .pl1_max_power = 15000,
+ .pl2_min_power = 57000,
+ .pl2_max_power = 57000,
+ .pl4_power = 114000
+ },
};
const struct cpu_tdp_power_limits power_optimized_limits[] = {
@@ -32,6 +41,15 @@ const struct cpu_tdp_power_limits power_optimized_limits[] = {
.pl2_max_power = 57000,
.pl4_power = 64000
},
+ {
+ .mch_id = PCI_DID_INTEL_MTL_P_ID_5,
+ .cpu_tdp = 15,
+ .pl1_min_power = 10000,
+ .pl1_max_power = 15000,
+ .pl2_min_power = 57000,
+ .pl2_max_power = 57000,
+ .pl4_power = 64000
+ },
};
void variant_devtree_update(void)