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-rw-r--r--src/mainboard/google/brya/variants/quandiso/overridetree.cb18
1 files changed, 15 insertions, 3 deletions
diff --git a/src/mainboard/google/brya/variants/quandiso/overridetree.cb b/src/mainboard/google/brya/variants/quandiso/overridetree.cb
index 64cd862d31..29a4cee08c 100644
--- a/src/mainboard/google/brya/variants/quandiso/overridetree.cb
+++ b/src/mainboard/google/brya/variants/quandiso/overridetree.cb
@@ -442,7 +442,11 @@ chip soc/intel/alderlake
chip drivers/intel/pmc_mux/conn
use usb2_port2 as usb2_port
use tcss_usb3_port2 as usb3_port
- device generic 1 alias conn1 on end
+ device generic 1 alias conn1 on
+ probe DB_USB DB_1C_1A
+ probe DB_USB DB_1C
+ probe DB_USB DB_1C_LTE
+ end
end
end
end
@@ -462,7 +466,11 @@ chip soc/intel/alderlake
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
- device ref tcss_usb3_port2 on end
+ device ref tcss_usb3_port2 on
+ probe DB_USB DB_1C_1A
+ probe DB_USB DB_1C
+ probe DB_USB DB_1C_LTE
+ end
end
end
end
@@ -482,7 +490,11 @@ chip soc/intel/alderlake
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "use_custom_pld" = "true"
register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
- device ref usb2_port2 on end
+ device ref usb2_port2 on
+ probe DB_USB DB_1C_1A
+ probe DB_USB DB_1C
+ probe DB_USB DB_1C_LTE
+ end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port A0 (MLB)""