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-rw-r--r--src/mainboard/google/brya/Kconfig13
-rw-r--r--src/mainboard/google/brya/variants/trulo/memory.c3
2 files changed, 16 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
index 95107c9a1a..a5bae12674 100644
--- a/src/mainboard/google/brya/Kconfig
+++ b/src/mainboard/google/brya/Kconfig
@@ -550,6 +550,7 @@ config BOARD_GOOGLE_TIVVIKS
config BOARD_GOOGLE_TRULO
select BOARD_GOOGLE_BASEBOARD_TRULO
+ select SKIP_RAM_ID_STRAPS
select SOC_INTEL_TWINLAKE
select SOC_INTEL_COMMON_BLOCK_HDA_VERB
select SOC_INTEL_TCSS_USE_PDC_PMC_USBC_MUX_CONFIGURATION
@@ -1000,4 +1001,16 @@ config PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS
int
default 33
+config SKIP_RAM_ID_STRAPS
+ bool
+ default n
+ help
+ Enable this option if the board variant does not rely on MEM Strap GPIOs to determine the SPD ID.
+
+ This is typically the case when the DRAM part is fixed (only one type is used).
+ In such board designs, enabling this option will bypass the reading of MEM Strap GPIOs
+ and instead use a static SPD ID number.
+
+ If unsure, leave this option disabled.
+
endif # BOARD_GOOGLE_BRYA_COMMON
diff --git a/src/mainboard/google/brya/variants/trulo/memory.c b/src/mainboard/google/brya/variants/trulo/memory.c
index a6f16db835..062854e95e 100644
--- a/src/mainboard/google/brya/variants/trulo/memory.c
+++ b/src/mainboard/google/brya/variants/trulo/memory.c
@@ -76,6 +76,9 @@ const struct mb_cfg *variant_memory_params(void)
int variant_memory_sku(void)
{
+ if (CONFIG(SKIP_RAM_ID_STRAPS))
+ return 0; /* SPD ID: 0 - MT62F512M32D2DR-031 WT:B */
+
/*
* Memory configuration board straps
* GPIO_MEM_CONFIG_0 GPP_E2