diff options
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/dell/optiplex_9020/devicetree.cb | 2 | ||||
| -rw-r--r-- | src/mainboard/dell/optiplex_9020/overridetree_mt.cb | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/src/mainboard/dell/optiplex_9020/devicetree.cb b/src/mainboard/dell/optiplex_9020/devicetree.cb index c0b17a15ff..dce5869478 100644 --- a/src/mainboard/dell/optiplex_9020/devicetree.cb +++ b/src/mainboard/dell/optiplex_9020/devicetree.cb @@ -23,7 +23,7 @@ chip northbridge/intel/haswell register "gen2_dec" = "0x007c0901" register "gen3_dec" = "0x003c07e1" register "gen4_dec" = "0x001c0901" - register "sata_port_map" = "0x33" + register "sata_port_map" = "0x7" device pci 14.0 on end # xHCI controller device pci 16.0 on end # Management Engine interface 1 diff --git a/src/mainboard/dell/optiplex_9020/overridetree_mt.cb b/src/mainboard/dell/optiplex_9020/overridetree_mt.cb index 90205c2d68..a7819601b9 100644 --- a/src/mainboard/dell/optiplex_9020/overridetree_mt.cb +++ b/src/mainboard/dell/optiplex_9020/overridetree_mt.cb @@ -3,6 +3,8 @@ chip northbridge/intel/haswell device domain 0 on chip southbridge/intel/lynxpoint + register "sata_port_map" = "0xf" + device pci 1c.1 on end # PCI (via XIO2001 bridge) device pci 1c.2 on end # PCIe 1x slot end |