diff options
Diffstat (limited to 'src/mainboard')
5 files changed, 92 insertions, 0 deletions
diff --git a/src/mainboard/intel/mtlrvp/Makefile.inc b/src/mainboard/intel/mtlrvp/Makefile.inc index e2fba1a78b..795b9ae0bb 100644 --- a/src/mainboard/intel/mtlrvp/Makefile.inc +++ b/src/mainboard/intel/mtlrvp/Makefile.inc @@ -4,6 +4,8 @@ all-$(CONFIG_CHROMEOS) += chromeos.c bootblock-y += bootblock.c +romstage-y += romstage.c + ramstage-y += ec.c ramstage-y += mainboard.c @@ -13,6 +15,7 @@ VARIANT_DIR:=$(call strip_quotes,$(CONFIG_VARIANT_DIR)) BASEBOARD_DIR:=$(call strip_quotes,$(CONFIG_BASEBOARD_DIR)) subdirs-y += variants/baseboard/$(BASEBOARD_DIR) +subdirs-y += variants/baseboard/$(BASEBOARD_DIR)/memory subdirs-y += variants/$(VARIANT_DIR) CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include diff --git a/src/mainboard/intel/mtlrvp/romstage.c b/src/mainboard/intel/mtlrvp/romstage.c new file mode 100644 index 0000000000..ecfaee00d1 --- /dev/null +++ b/src/mainboard/intel/mtlrvp/romstage.c @@ -0,0 +1,44 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/variants.h> +#include <console/console.h> +#include <ec/intel/board_id.h> +#include <soc/romstage.h> + +void mainboard_memory_init_params(FSPM_UPD *memupd) +{ + const struct mb_cfg *mem_config = variant_memory_params(); + int board_id = get_rvp_board_id(); + const bool half_populated = false; + + const struct mem_spd dimm_module_spd_info = { + .topo = MEM_TOPO_DIMM_MODULE, + .smbus = { + [0] = { + .addr_dimm[0] = 0x50, + .addr_dimm[1] = 0x0, + }, + [1] = { + .addr_dimm[0] = 0x50, + .addr_dimm[1] = 0x0, + }, + [2] = { + .addr_dimm[0] = 0x52, + .addr_dimm[1] = 0x0, + }, + [3] = { + .addr_dimm[0] = 0x52, + .addr_dimm[1] = 0x0, + }, + }, + }; + + switch (board_id) { + case MTLP_DDR5_RVP: + memcfg_init(memupd, mem_config, &dimm_module_spd_info, half_populated); + break; + default: + die("Unknown board id = 0x%x\n", board_id); + break; + } +} diff --git a/src/mainboard/intel/mtlrvp/variants/baseboard/include/baseboard/variants.h b/src/mainboard/intel/mtlrvp/variants/baseboard/include/baseboard/variants.h index 562abdf33a..f755ff0238 100644 --- a/src/mainboard/intel/mtlrvp/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/intel/mtlrvp/variants/baseboard/include/baseboard/variants.h @@ -3,6 +3,7 @@ #ifndef __BASEBOARD_VARIANTS_H__ #define __BASEBOARD_VARIANTS_H__ +#include <soc/meminit.h> #include <stdint.h> enum mtl_boardid { @@ -16,4 +17,7 @@ enum mtl_boardid { void configure_early_gpio_pads(void); void configure_gpio_pads(void); +/* Function to initialize memory params based on variant */ +const struct mb_cfg *variant_memory_params(void); + #endif /*__BASEBOARD_VARIANTS_H__ */ diff --git a/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/memory/Makefile.inc b/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/memory/Makefile.inc new file mode 100644 index 0000000000..566f5cc767 --- /dev/null +++ b/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/memory/Makefile.inc @@ -0,0 +1,3 @@ +## SPDX-License-Identifier: GPL-2.0-or-later + +romstage-y += memory.c diff --git a/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/memory/memory.c b/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/memory/memory.c new file mode 100644 index 0000000000..d4a53c8f26 --- /dev/null +++ b/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/memory/memory.c @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/variants.h> +#include <console/console.h> +#include <ec/intel/board_id.h> +#include <soc/romstage.h> + +static const struct mb_cfg ddr5_mem_config = { + .type = MEM_TYPE_DDR5, + + .rcomp = { + /* As per doc #729782, baseboard uses only 100 Ohm Rcomp resistor */ + .resistor = 100, + }, + + .ect = true, /* Early Command Training */ + + .UserBd = BOARD_TYPE_ULT_ULX, + + .LpDdrDqDqsReTraining = 1, + + .ddr_config = { + .dq_pins_interleaved = false, + } +}; + +const struct mb_cfg *variant_memory_params(void) +{ + int board_id = get_rvp_board_id(); + + switch (board_id) { + case MTLP_DDR5_RVP: + return &ddr5_mem_config; + default: + die("Unknown board id = 0x%x\n", board_id); + break; + } +} |