summaryrefslogtreecommitdiff
path: root/src/mainboard
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb1
-rw-r--r--src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb1
2 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb
index e96e654f8f..228bf60128 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb
@@ -18,7 +18,6 @@ chip soc/intel/elkhartlake
# FSP configuration
register "SaGv" = "SaGv_Disabled"
register "SmbusEnable" = "1"
- register "Heci2Enable" = "1"
# Enable IBECC for the complete memory
register "ibecc" = "{
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
index 67ff3d0377..39789be85a 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
@@ -18,7 +18,6 @@ chip soc/intel/elkhartlake
# FSP configuration
register "SaGv" = "SaGv_Disabled"
register "SmbusEnable" = "1"
- register "Heci2Enable" = "1"
# Enable IBECC for the complete memory
register "ibecc" = "{