summaryrefslogtreecommitdiff
path: root/src/mainboard
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/amd/inagua/romstage.c52
-rw-r--r--src/mainboard/amd/persimmon/romstage.c60
-rw-r--r--src/mainboard/amd/south_station/romstage.c56
-rw-r--r--src/mainboard/amd/torpedo/get_bus_conf.c22
-rw-r--r--src/mainboard/amd/torpedo/romstage.c60
-rw-r--r--src/mainboard/amd/union_station/romstage.c54
-rw-r--r--src/mainboard/asrock/e350m1/romstage.c60
7 files changed, 200 insertions, 164 deletions
diff --git a/src/mainboard/amd/inagua/romstage.c b/src/mainboard/amd/inagua/romstage.c
index d5fa8c548b..88c018ea3f 100644
--- a/src/mainboard/amd/inagua/romstage.c
+++ b/src/mainboard/amd/inagua/romstage.c
@@ -63,47 +63,50 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x34);
report_bist_failure(bist);
- // Load MPB
+ /* Load MPB */
val = cpuid_eax(1);
printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx);
post_code(0x35);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitmmio ");
val = agesawrapper_amdinitmmio();
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
post_code(0x37);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitreset ");
val = agesawrapper_amdinitreset();
- if (val) {
- printk(BIOS_DEBUG, "agesawrapper_amdinitreset failed: %x \n",
- val);
- }
-
- post_code(0x38);
- printk(BIOS_DEBUG, "Got past sb800_early_setup\n");
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
post_code(0x39);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitearly ");
val = agesawrapper_amdinitearly();
- if (val) {
- printk(BIOS_DEBUG, "agesawrapper_amdinitearly failed: %x \n",
- val);
- }
- printk(BIOS_DEBUG, "Got past agesawrapper_amdinitearly\n");
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
post_code(0x40);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitpost ");
val = agesawrapper_amdinitpost();
- if (val) {
- printk(BIOS_DEBUG, "agesawrapper_amdinitpost failed: %x \n",
- val);
- }
- printk(BIOS_DEBUG, "Got past agesawrapper_amdinitpost\n");
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
post_code(0x41);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitenv ");
val = agesawrapper_amdinitenv();
- if (val) {
- printk(BIOS_DEBUG, "agesawrapper_amdinitenv failed: %x \n",
- val);
- }
- printk(BIOS_DEBUG, "Got past agesawrapper_amdinitenv\n");
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
/* Initialize i8259 pic */
post_code(0x41);
@@ -115,6 +118,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x50);
copy_and_run(0);
+ printk(BIOS_ERR, "Error: copy_and_run() returned!\n");
- post_code(0x54); // Should never see this post code.
+ post_code(0x54); /* Should never see this post code. */
}
diff --git a/src/mainboard/amd/persimmon/romstage.c b/src/mainboard/amd/persimmon/romstage.c
index bf8535f9f1..dfb1aca729 100644
--- a/src/mainboard/amd/persimmon/romstage.c
+++ b/src/mainboard/amd/persimmon/romstage.c
@@ -9,12 +9,12 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <stdint.h>
@@ -46,12 +46,14 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
u32 val;
- // all cores: allow caching of flash chip code and data
- // (there are no cache-as-ram reliability concerns with family 14h)
+ /*
+ * All cores: allow caching of flash chip code and data
+ * (there are no cache-as-ram reliability concerns with family 14h)
+ */
__writemsr (0x20c, (0x0100000000ull - CONFIG_ROM_SIZE) | 5);
__writemsr (0x20d, (0x1000000000ull - CONFIG_ROM_SIZE) | 0x800);
- // all cores: set pstate 0 (1600 MHz) early to save a few ms of boot time
+ /* All cores: set pstate 0 (1600 MHz) early to save a few ms of boot time */
__writemsr (0xc0010062, 0);
if (!cpu_init_detectedx && boot_cpu()) {
@@ -67,43 +69,50 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x34);
report_bist_failure(bist);
- // Load MPB
+ /* Load MPB */
val = cpuid_eax(1);
printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx);
post_code(0x35);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitmmio ");
val = agesawrapper_amdinitmmio();
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
post_code(0x37);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitreset ");
val = agesawrapper_amdinitreset();
- if(val) {
- printk(BIOS_DEBUG, "agesawrapper_amdinitreset failed: %x \n", val);
- }
-
- post_code(0x38);
- printk(BIOS_DEBUG, "Got past sb800_early_setup\n");
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
post_code(0x39);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitearly ");
val = agesawrapper_amdinitearly ();
- if(val) {
- printk(BIOS_DEBUG, "agesawrapper_amdinitearly failed: %x \n", val);
- }
- printk(BIOS_DEBUG, "Got past agesawrapper_amdinitearly\n");
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
post_code(0x40);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitpost ");
val = agesawrapper_amdinitpost ();
- if(val) {
- printk(BIOS_DEBUG, "agesawrapper_amdinitpost failed: %x \n", val);
- }
- printk(BIOS_DEBUG, "Got past agesawrapper_amdinitpost\n");
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
post_code(0x41);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitenv ");
val = agesawrapper_amdinitenv ();
- if(val) {
- printk(BIOS_DEBUG, "agesawrapper_amdinitenv failed: %x \n", val);
- }
- printk(BIOS_DEBUG, "Got past agesawrapper_amdinitenv\n");
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
/* Initialize i8259 pic */
post_code(0x41);
@@ -115,6 +124,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x50);
copy_and_run(0);
+ printk(BIOS_ERR, "Error: copy_and_run() returned!\n");
- post_code(0x54); // Should never see this post code.
+ post_code(0x54); /* Should never see this post code. */
}
diff --git a/src/mainboard/amd/south_station/romstage.c b/src/mainboard/amd/south_station/romstage.c
index 95f27bd0ae..8ebe7a6115 100644
--- a/src/mainboard/amd/south_station/romstage.c
+++ b/src/mainboard/amd/south_station/romstage.c
@@ -43,12 +43,14 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
u32 val;
- // all cores: allow caching of flash chip code and data
- // (there are no cache-as-ram reliability concerns with family 14h)
+ /*
+ * All cores: allow caching of flash chip code and data
+ * (there are no cache-as-ram reliability concerns with family 14h)
+ */
__writemsr (0x20c, (0x0100000000ull - CONFIG_ROM_SIZE) | 5);
__writemsr (0x20d, (0x1000000000ull - CONFIG_ROM_SIZE) | 0x800);
- // all cores: set pstate 0 (1600 MHz) early to save a few ms of boot time
+ /* All cores: set pstate 0 (1600 MHz) early to save a few ms of boot time */
__writemsr (0xc0010062, 0);
if (!cpu_init_detectedx && boot_cpu()) {
@@ -64,47 +66,55 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x34);
report_bist_failure(bist);
- // Load MPB
+ /* Load MPB */
val = cpuid_eax(1);
printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx);
post_code(0x35);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitmmio ");
val = agesawrapper_amdinitmmio();
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
post_code(0x37);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitreset ");
val = agesawrapper_amdinitreset();
- if(val) {
- printk(BIOS_DEBUG, "agesawrapper_amdinitreset failed: %x \n", val);
- }
-
- post_code(0x38);
- printk(BIOS_DEBUG, "Got past sb800_early_setup\n");
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
post_code(0x39);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitearly ");
val = agesawrapper_amdinitearly ();
- if(val) {
- printk(BIOS_DEBUG, "agesawrapper_amdinitearly failed: %x \n", val);
- }
- printk(BIOS_DEBUG, "Got past agesawrapper_amdinitearly\n");
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
post_code(0x40);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitpost ");
val = agesawrapper_amdinitpost ();
- if(val) {
- printk(BIOS_DEBUG, "agesawrapper_amdinitpost failed: %x \n", val);
- }
- printk(BIOS_DEBUG, "Got past agesawrapper_amdinitpost\n");
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
post_code(0x41);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitenv ");
val = agesawrapper_amdinitenv ();
- if(val) {
- printk(BIOS_DEBUG, "agesawrapper_amdinitenv failed: %x \n", val);
- }
- printk(BIOS_DEBUG, "Got past agesawrapper_amdinitenv\n");
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
post_code(0x50);
copy_and_run(0);
+ printk(BIOS_ERR, "Error: copy_and_run() returned!\n");
- post_code(0x54); // Should never see this post code.
+ post_code(0x54); /* Should never see this post code. */
}
diff --git a/src/mainboard/amd/torpedo/get_bus_conf.c b/src/mainboard/amd/torpedo/get_bus_conf.c
index 7dbe9a5715..13eadaae89 100644
--- a/src/mainboard/amd/torpedo/get_bus_conf.c
+++ b/src/mainboard/amd/torpedo/get_bus_conf.c
@@ -54,7 +54,6 @@ u32 bus_type[256];
u32 sbdn_sb900;
-//KZ [092110]extern void get_pci1234(void);
static u32 get_bus_conf_done = 0;
@@ -70,8 +69,7 @@ void get_bus_conf(void)
get_bus_conf_done = 1;
- printk(BIOS_DEBUG,
- "Mainboard - Get_bus_conf.c - get_bus_conf - Start.\n");
+ printk(BIOS_DEBUG, "Mainboard - %s - %s - Start.\n", __FILE__, __func__);
/*
* This is the call to AmdInitLate. It is really in the wrong place, conceptually,
* but functionally within the coreboot model, this is the best place to make the
@@ -87,12 +85,12 @@ void get_bus_conf(void)
* of each of the write functions called prior to the ACPI write functions, so this
* becomes the best place for this call.
*/
+ printk(BIOS_DEBUG, "agesawrapper_amdinitlate ");
status = agesawrapper_amdinitlate();
- if (status) {
- printk(BIOS_DEBUG, "agesawrapper_amdinitlate failed: %x \n",
- status);
- }
- printk(BIOS_DEBUG, "Got past agesawrapper_amdinitlate\n");
+ if (status)
+ printk(BIOS_DEBUG, "error level: %x \n", status);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
sbdn_sb900 = 0;
@@ -106,7 +104,6 @@ void get_bus_conf(void)
bus_type[0] = 1; /* pci */
-// bus_sb900[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_sb900[0] = (pci1234x[0] >> 16) & 0xff;
/* sb900 */
@@ -114,7 +111,6 @@ void get_bus_conf(void)
if (dev) {
bus_sb900[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
for (j = bus_sb900[1]; j < bus_isa; j++)
@@ -122,8 +118,7 @@ void get_bus_conf(void)
}
for (i = 0; i < 4; i++) {
- dev =
- dev_find_slot(bus_sb900[0],
+ dev = dev_find_slot(bus_sb900[0],
PCI_DEVFN(sbdn_sb900 + 0x14, i));
if (dev) {
bus_sb900[2 + i] =
@@ -139,6 +134,5 @@ void get_bus_conf(void)
bus_isa = 10;
sb_Late_Post();
- printk(BIOS_DEBUG,
- "Mainboard - Get_bus_conf.c - get_bus_conf - End.\n");
+ printk(BIOS_DEBUG, "Mainboard - %s - %s - End.\n", __FILE__, __func__);
}
diff --git a/src/mainboard/amd/torpedo/romstage.c b/src/mainboard/amd/torpedo/romstage.c
index ea902d87c0..2e1d8fcb87 100644
--- a/src/mainboard/amd/torpedo/romstage.c
+++ b/src/mainboard/amd/torpedo/romstage.c
@@ -45,12 +45,12 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
u32 val;
post_code(0x35);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitmmio ");
val = agesawrapper_amdinitmmio();
- if (val) {
- printk(BIOS_DEBUG, "agesawrapper_amdinitmmio failed: %x \n",
- val);
- }
- printk(BIOS_DEBUG, "Got past agesawrapper_amdinitmmio\n");
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
if (!cpu_init_detectedx && boot_cpu()) {
post_code(0x30);
@@ -77,54 +77,56 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx);
post_code(0x36);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitreset ");
val = agesawrapper_amdinitreset();
- if (val) {
- printk(BIOS_DEBUG, "agesawrapper_amdinitreset failed: %x \n",
- val);
- }
- printk(BIOS_DEBUG, "Got past agesawrapper_amdinitreset\n");
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
post_code(0x37);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitearly ");
val = agesawrapper_amdinitearly();
- if (val) {
- printk(BIOS_DEBUG, "agesawrapper_amdinitearly failed: %x \n",
- val);
- }
- printk(BIOS_DEBUG, "Got past agesawrapper_amdinitearly\n");
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
post_code(0x38);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitpost ");
val = agesawrapper_amdinitpost();
- if (val) {
- printk(BIOS_DEBUG, "agesawrapper_amdinitpost failed: %x \n",
- val);
- }
- printk(BIOS_DEBUG, "Got past agesawrapper_amdinitpost\n");
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
post_code(0x39);
+ printk(BIOS_DEBUG, "sb_before_pci_init ");
sb_before_pci_init();
- printk(BIOS_DEBUG, "Got past sb_before_pci_init\n");
+ printk(BIOS_DEBUG, "passed.\n");
post_code(0x40);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitenv ");
val = agesawrapper_amdinitenv();
- if (val) {
- printk(BIOS_DEBUG, "agesawrapper_amdinitenv failed: %x \n",
- val);
- }
- printk(BIOS_DEBUG, "Got past agesawrapper_amdinitenv\n");
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
/* Initialize i8259 pic */
post_code(0x41);
+ printk(BIOS_DEBUG, "setup_i8259\n");
setup_i8259();
- printk(BIOS_DEBUG, "Got past setup_i8259\n");
/* Initialize i8254 timers */
post_code(0x42);
+ printk(BIOS_DEBUG, "setup_i8254\n");
setup_i8254();
- printk(BIOS_DEBUG, "Got past setup_i8254\n");
+
post_code(0x43);
copy_and_run(0);
- printk(BIOS_DEBUG, "Got past copy_and_run\n");
+ printk(BIOS_ERR, "Error: copy_and_run returned!\n");
post_code(0x44); // Should never see this post code.
}
diff --git a/src/mainboard/amd/union_station/romstage.c b/src/mainboard/amd/union_station/romstage.c
index e7f05e84f5..26a05e890f 100644
--- a/src/mainboard/amd/union_station/romstage.c
+++ b/src/mainboard/amd/union_station/romstage.c
@@ -43,8 +43,10 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
u32 val;
- // all cores: allow caching of flash chip code and data
- // (there are no cache-as-ram reliability concerns with family 14h)
+ /*
+ * All cores: allow caching of flash chip code and data
+ * (there are no cache-as-ram reliability concerns with family 14h)
+ */
__writemsr (0x20c, (0x0100000000ull - CONFIG_ROM_SIZE) | 5);
__writemsr (0x20d, (0x1000000000ull - CONFIG_ROM_SIZE) | 0x800);
@@ -61,47 +63,55 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x34);
report_bist_failure(bist);
- // Load MPB
+ /* Load MPB */
val = cpuid_eax(1);
printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx);
post_code(0x35);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitmmio ");
val = agesawrapper_amdinitmmio();
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
post_code(0x37);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitreset ");
val = agesawrapper_amdinitreset();
- if(val) {
- printk(BIOS_DEBUG, "agesawrapper_amdinitreset failed: %x \n", val);
- }
-
- post_code(0x38);
- printk(BIOS_DEBUG, "Got past sb800_early_setup\n");
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
post_code(0x39);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitearly ");
val = agesawrapper_amdinitearly ();
- if(val) {
- printk(BIOS_DEBUG, "agesawrapper_amdinitearly failed: %x \n", val);
- }
- printk(BIOS_DEBUG, "Got past agesawrapper_amdinitearly\n");
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
post_code(0x40);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitpost ");
val = agesawrapper_amdinitpost ();
- if(val) {
- printk(BIOS_DEBUG, "agesawrapper_amdinitpost failed: %x \n", val);
- }
- printk(BIOS_DEBUG, "Got past agesawrapper_amdinitpost\n");
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
post_code(0x41);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitenv ");
val = agesawrapper_amdinitenv ();
- if(val) {
- printk(BIOS_DEBUG, "agesawrapper_amdinitenv failed: %x \n", val);
- }
- printk(BIOS_DEBUG, "Got past agesawrapper_amdinitenv\n");
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
post_code(0x50);
copy_and_run(0);
+ printk(BIOS_ERR, "Error: copy_and_run() returned!\n");
- post_code(0x54); // Should never see this post code.
+ post_code(0x54); /* Should never see this post code. */
}
diff --git a/src/mainboard/asrock/e350m1/romstage.c b/src/mainboard/asrock/e350m1/romstage.c
index 133aca7350..8b46b19e8d 100644
--- a/src/mainboard/asrock/e350m1/romstage.c
+++ b/src/mainboard/asrock/e350m1/romstage.c
@@ -47,12 +47,14 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
u32 val;
u8 reg8;
- // all cores: allow caching of flash chip code and data
- // (there are no cache-as-ram reliability concerns with family 14h)
+ /*
+ * All cores: allow caching of flash chip code and data
+ * (there are no cache-as-ram reliability concerns with family 14h)
+ */
__writemsr(0x20c, (0x0100000000ull - CONFIG_ROM_SIZE) | 5);
__writemsr(0x20d, (0x1000000000ull - CONFIG_ROM_SIZE) | 0x800);
- // all cores: set pstate 0 (1600 MHz) early to save a few ms of boot time
+ /* All cores: set pstate 0 (1600 MHz) early to save a few ms of boot time */
__writemsr(0xc0010062, 0);
if (!cpu_init_detectedx && boot_cpu()) {
@@ -68,47 +70,50 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x34);
report_bist_failure(bist);
- // Load MPB
+ /* Load MPB */
val = cpuid_eax(1);
printk(BIOS_DEBUG, "BSP Family_Model: %08x \n", val);
printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx \n", cpu_init_detectedx);
post_code(0x35);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitmmio ");
val = agesawrapper_amdinitmmio();
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
post_code(0x37);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitreset ");
val = agesawrapper_amdinitreset();
- if (val) {
- printk(BIOS_DEBUG, "agesawrapper_amdinitreset failed: %x \n",
- val);
- }
-
- post_code(0x38);
- printk(BIOS_DEBUG, "Got past sb800_early_setup\n");
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
post_code(0x39);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitearly ");
val = agesawrapper_amdinitearly();
- if (val) {
- printk(BIOS_DEBUG, "agesawrapper_amdinitearly failed: %x \n",
- val);
- }
- printk(BIOS_DEBUG, "Got past agesawrapper_amdinitearly\n");
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
post_code(0x40);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitpost ");
val = agesawrapper_amdinitpost();
- if (val) {
- printk(BIOS_DEBUG, "agesawrapper_amdinitpost failed: %x \n",
- val);
- }
- printk(BIOS_DEBUG, "Got past agesawrapper_amdinitpost\n");
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
post_code(0x41);
+ printk(BIOS_DEBUG, "agesawrapper_amdinitenv ");
val = agesawrapper_amdinitenv();
- if (val) {
- printk(BIOS_DEBUG, "agesawrapper_amdinitenv failed: %x \n",
- val);
- }
- printk(BIOS_DEBUG, "Got past agesawrapper_amdinitenv\n");
+ if (val)
+ printk(BIOS_DEBUG, "error level: %x \n", val);
+ else
+ printk(BIOS_DEBUG, "passed.\n");
/* Initialize i8259 pic */
post_code(0x41);
@@ -120,6 +125,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x50);
copy_and_run(0);
+ printk(BIOS_ERR, "Error: copy_and_run() returned!\n");
- post_code(0x54); // Should never see this post code.
+ post_code(0x54); /* Should never see this post code. */
}