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-rw-r--r--src/mainboard/google/brya/variants/anahera/gpio.c25
1 files changed, 12 insertions, 13 deletions
diff --git a/src/mainboard/google/brya/variants/anahera/gpio.c b/src/mainboard/google/brya/variants/anahera/gpio.c
index ab3ea66f49..9483d564ab 100644
--- a/src/mainboard/google/brya/variants/anahera/gpio.c
+++ b/src/mainboard/google/brya/variants/anahera/gpio.c
@@ -21,13 +21,13 @@ static const struct pad_config override_gpio_table[] = {
PAD_NC(GPP_A22, NONE),
/* B3 : PROC_GP2 ==> eMMC_PERST_L */
- PAD_CFG_GPO(GPP_B3, 1, DEEP),
+ PAD_CFG_GPO_LOCK(GPP_B3, 1, LOCK_CONFIG),
/* B5 : ISH_I2C0_SDA ==> NC */
- PAD_NC(GPP_B5, NONE),
+ PAD_NC_LOCK(GPP_B5, NONE, LOCK_CONFIG),
/* B6 : ISH_I2C0_SCL ==> NC */
- PAD_NC(GPP_B6, NONE),
+ PAD_NC_LOCK(GPP_B6, NONE, LOCK_CONFIG),
/* B15 : TIME_SYNC0 ==> NC */
- PAD_NC(GPP_B15, NONE),
+ PAD_NC_LOCK(GPP_B15, NONE, LOCK_CONFIG),
/* C3 : SML0CLK ==> NC */
PAD_NC(GPP_C3, NONE),
@@ -35,21 +35,21 @@ static const struct pad_config override_gpio_table[] = {
PAD_NC(GPP_C4, NONE),
/* D3 : ISH_GP3 ==> NC */
- PAD_NC(GPP_D3, NONE),
+ PAD_NC_LOCK(GPP_D3, NONE, LOCK_CONFIG),
/* D5 : SRCCLKREQ0# ==> NC */
PAD_NC(GPP_D5, NONE),
/* D7 : SRCCLKREQ2# ==> NC */
PAD_NC(GPP_D7, NONE),
/* D13 : ISH_UART0_RXD ==> NC */
- PAD_NC(GPP_D13, NONE),
+ PAD_NC_LOCK(GPP_D13, NONE, LOCK_CONFIG),
/* D14 : ISH_UART0_TXD ==> NC */
- PAD_NC(GPP_D14, NONE),
+ PAD_NC_LOCK(GPP_D14, NONE, LOCK_CONFIG),
/* D15 : ISH_UART0_RTS# ==> EN_WCAM_SENR_PWR */
- PAD_CFG_GPO(GPP_D15, 1, DEEP),
+ PAD_CFG_GPO_LOCK(GPP_D15, 1, LOCK_CONFIG),
/* D16 : ISH_UART0_CTS# ==> NC */
- PAD_NC(GPP_D16, NONE),
+ PAD_NC_LOCK(GPP_D16, NONE, LOCK_CONFIG),
/* D17 : UART1_RXD ==> NC */
- PAD_NC(GPP_D17, NONE),
+ PAD_NC_LOCK(GPP_D17, NONE, LOCK_CONFIG),
/* E0 : SATAXPCIE0 ==> WWAN_PERST_L */
PAD_CFG_GPO(GPP_E0, 1, PLTRST),
@@ -59,14 +59,13 @@ static const struct pad_config override_gpio_table[] = {
PAD_NC(GPP_E7, NONE),
/* E16 : RSVD_TP ==> WWAN_RST_L */
PAD_CFG_GPO(GPP_E16, 1, DEEP),
- /* F19 : SRCCLKREQ6# ==> EMMC_CLKREQ_ODL */
- PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),
-
/* E20 : USB_C1_LSX_SOC_TX ==> EN_PP3300_eMMC */
PAD_CFG_GPO(GPP_E20, 1, DEEP),
/* E23 : DDPA_CTRLDATA ==> NC */
PAD_NC(GPP_E23, NONE),
+ /* F19 : SRCCLKREQ6# ==> EMMC_CLKREQ_ODL */
+ PAD_CFG_NF(GPP_F19, NONE, DEEP, NF1),
/* F20 : EXT_PWR_GATE# ==> NC */
PAD_NC(GPP_F20, NONE),