diff options
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/chell/devicetree.cb | 6 | ||||
| -rw-r--r-- | src/mainboard/google/eve/devicetree.cb | 6 | ||||
| -rw-r--r-- | src/mainboard/google/fizz/devicetree.cb | 6 | ||||
| -rw-r--r-- | src/mainboard/google/glados/devicetree.cb | 6 | ||||
| -rw-r--r-- | src/mainboard/google/lars/devicetree.cb | 3 | ||||
| -rw-r--r-- | src/mainboard/google/poppy/devicetree.cb | 6 | ||||
| -rw-r--r-- | src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb | 3 | ||||
| -rw-r--r-- | src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb | 3 | ||||
| -rw-r--r-- | src/mainboard/intel/kunimitsu/devicetree.cb | 3 |
9 files changed, 28 insertions, 14 deletions
diff --git a/src/mainboard/google/chell/devicetree.cb b/src/mainboard/google/chell/devicetree.cb index 477a8aa777..5df9ea625e 100644 --- a/src/mainboard/google/chell/devicetree.cb +++ b/src/mainboard/google/chell/devicetree.cb @@ -1,8 +1,10 @@ chip soc/intel/skylake # Enable deep Sx states - register "deep_s3_enable" = "0" - register "deep_s5_enable" = "1" + register "deep_s3_enable_ac" = "0" + register "deep_s3_enable_dc" = "0" + register "deep_s5_enable_ac" = "1" + register "deep_s5_enable_dc" = "1" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN" # GPE configuration diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb index 427ba6b916..f995ab7d37 100644 --- a/src/mainboard/google/eve/devicetree.cb +++ b/src/mainboard/google/eve/devicetree.cb @@ -1,8 +1,10 @@ chip soc/intel/skylake # Enable deep Sx states - register "deep_s3_enable" = "1" - register "deep_s5_enable" = "1" + register "deep_s3_enable_ac" = "1" + register "deep_s3_enable_dc" = "1" + register "deep_s5_enable_ac" = "1" + register "deep_s5_enable_dc" = "1" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN" # GPE configuration diff --git a/src/mainboard/google/fizz/devicetree.cb b/src/mainboard/google/fizz/devicetree.cb index e498dc9012..ee0217792d 100644 --- a/src/mainboard/google/fizz/devicetree.cb +++ b/src/mainboard/google/fizz/devicetree.cb @@ -1,8 +1,10 @@ chip soc/intel/skylake # Deep Sx states - register "deep_s3_enable" = "0" - register "deep_s5_enable" = "1" + register "deep_s3_enable_ac" = "0" + register "deep_s3_enable_dc" = "0" + register "deep_s5_enable_ac" = "1" + register "deep_s5_enable_dc" = "1" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN" # GPE configuration diff --git a/src/mainboard/google/glados/devicetree.cb b/src/mainboard/google/glados/devicetree.cb index f7a2e52a19..d4155ea6b8 100644 --- a/src/mainboard/google/glados/devicetree.cb +++ b/src/mainboard/google/glados/devicetree.cb @@ -1,8 +1,10 @@ chip soc/intel/skylake # Enable deep Sx states - register "deep_s3_enable" = "0" - register "deep_s5_enable" = "1" + register "deep_s3_enable_ac" = "0" + register "deep_s3_enable_dc" = "0" + register "deep_s5_enable_ac" = "1" + register "deep_s5_enable_dc" = "1" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN" # GPE configuration diff --git a/src/mainboard/google/lars/devicetree.cb b/src/mainboard/google/lars/devicetree.cb index b95ecf5d88..ed1de93258 100644 --- a/src/mainboard/google/lars/devicetree.cb +++ b/src/mainboard/google/lars/devicetree.cb @@ -1,7 +1,8 @@ chip soc/intel/skylake # Enable deep Sx states - register "deep_s5_enable" = "1" + register "deep_s5_enable_ac" = "1" + register "deep_s5_enable_dc" = "1" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN" # GPE configuration diff --git a/src/mainboard/google/poppy/devicetree.cb b/src/mainboard/google/poppy/devicetree.cb index 44db5e9187..ed25136ba3 100644 --- a/src/mainboard/google/poppy/devicetree.cb +++ b/src/mainboard/google/poppy/devicetree.cb @@ -1,8 +1,10 @@ chip soc/intel/skylake # Deep Sx states - register "deep_s3_enable" = "0" - register "deep_s5_enable" = "1" + register "deep_s3_enable_ac" = "0" + register "deep_s3_enable_dc" = "0" + register "deep_s5_enable_ac" = "1" + register "deep_s5_enable_dc" = "1" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN" # GPE configuration diff --git a/src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb b/src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb index 00b20ba3f7..23c8d3c962 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb @@ -1,7 +1,8 @@ chip soc/intel/skylake # Enable deep Sx states - register "deep_s5_enable" = "0" + register "deep_s5_enable_ac" = "0" + register "deep_s5_enable_dc" = "0" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN" # GPE configuration diff --git a/src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb b/src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb index 369629263b..a56345c00d 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb @@ -7,7 +7,8 @@ chip soc/intel/skylake register "SataPortsEnable[2]" = "1" # Enable deep Sx states - register "deep_s5_enable" = "1" + register "deep_s5_enable_ac" = "1" + register "deep_s5_enable_dc" = "1" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN" # GPE configuration diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb index 11cb31a413..17e8e27606 100644 --- a/src/mainboard/intel/kunimitsu/devicetree.cb +++ b/src/mainboard/intel/kunimitsu/devicetree.cb @@ -1,7 +1,8 @@ chip soc/intel/skylake # Enable deep Sx states - register "deep_s5_enable" = "1" + register "deep_s5_enable_ac" = "1" + register "deep_s5_enable_dc" = "1" register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN" # GPE configuration |