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-rw-r--r--src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb
index d19f627393..cc6664cd74 100644
--- a/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb
@@ -125,6 +125,14 @@ chip soc/intel/alderlake
end
device ref heci1 on end
device ref sata on end
+ device ref pcie_rp7 on
+ # Enable PCIE 7 using clk 6
+ register "pch_pcie_rp[PCH_RP(7)]" = "{
+ .clk_src = 6,
+ .clk_req = 6,
+ .flags = PCIE_RP_LTR | PCIE_RP_AER,
+ }"
+ end #PCIE7 RTL8125 Ethernet NIC
device ref pcie_rp8 on
# Enable SD Card PCIE 8 using clk 3
register "pch_pcie_rp[PCH_RP(8)]" = "{