summaryrefslogtreecommitdiff
path: root/src/mainboard
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/Iwill/DK8S2/failover.c11
-rw-r--r--src/mainboard/Iwill/DK8X/failover.c11
-rw-r--r--src/mainboard/amd/quartet/failover.c11
-rw-r--r--src/mainboard/amd/serenade/failover.c11
-rw-r--r--src/mainboard/amd/solo/failover.c11
-rw-r--r--src/mainboard/arima/hdama/failover.c8
-rw-r--r--src/mainboard/ibm/e325/failover.c11
-rw-r--r--src/mainboard/ibm/e326/failover.c11
-rw-r--r--src/mainboard/island/aruma/failover.c11
-rw-r--r--src/mainboard/newisys/khepri/failover.c11
-rw-r--r--src/mainboard/tyan/s2875/failover.c25
-rw-r--r--src/mainboard/tyan/s2880/failover.c25
-rw-r--r--src/mainboard/tyan/s2881/failover.c25
-rw-r--r--src/mainboard/tyan/s2882/failover.c25
-rw-r--r--src/mainboard/tyan/s2885/failover.c29
-rw-r--r--src/mainboard/tyan/s2891/failover.c26
-rw-r--r--src/mainboard/tyan/s2892/failover.c27
-rw-r--r--src/mainboard/tyan/s2895/failover.c30
-rw-r--r--src/mainboard/tyan/s4880/failover.c25
-rw-r--r--src/mainboard/tyan/s4882/failover.c28
20 files changed, 58 insertions, 314 deletions
diff --git a/src/mainboard/Iwill/DK8S2/failover.c b/src/mainboard/Iwill/DK8S2/failover.c
index 63fa9346e1..262fdd60bd 100644
--- a/src/mainboard/Iwill/DK8S2/failover.c
+++ b/src/mainboard/Iwill/DK8S2/failover.c
@@ -9,6 +9,7 @@
#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/reset_test.c"
static unsigned long main(unsigned long bist)
@@ -19,11 +20,11 @@ static unsigned long main(unsigned long bist)
enable_lapic();
/* Is this a cpu only reset? */
- if (cpu_init_detected(nodeid)) {
+ if (early_mtrr_init_detected()) {
if (last_boot_normal()) {
goto normal_image;
} else {
- goto cpu_reset;
+ goto fallback_image;
}
}
/* Is this a secondary cpu? */
@@ -60,12 +61,6 @@ static unsigned long main(unsigned long bist)
: "a" (bist) /* inputs */
: /* clobbers */
);
- cpu_reset:
- asm volatile ("jmp __cpu_reset"
- : /* outputs */
- : "a"(bist) /* inputs */
- : /* clobbers */
- );
fallback_image:
return bist;
}
diff --git a/src/mainboard/Iwill/DK8X/failover.c b/src/mainboard/Iwill/DK8X/failover.c
index 63fa9346e1..262fdd60bd 100644
--- a/src/mainboard/Iwill/DK8X/failover.c
+++ b/src/mainboard/Iwill/DK8X/failover.c
@@ -9,6 +9,7 @@
#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/reset_test.c"
static unsigned long main(unsigned long bist)
@@ -19,11 +20,11 @@ static unsigned long main(unsigned long bist)
enable_lapic();
/* Is this a cpu only reset? */
- if (cpu_init_detected(nodeid)) {
+ if (early_mtrr_init_detected()) {
if (last_boot_normal()) {
goto normal_image;
} else {
- goto cpu_reset;
+ goto fallback_image;
}
}
/* Is this a secondary cpu? */
@@ -60,12 +61,6 @@ static unsigned long main(unsigned long bist)
: "a" (bist) /* inputs */
: /* clobbers */
);
- cpu_reset:
- asm volatile ("jmp __cpu_reset"
- : /* outputs */
- : "a"(bist) /* inputs */
- : /* clobbers */
- );
fallback_image:
return bist;
}
diff --git a/src/mainboard/amd/quartet/failover.c b/src/mainboard/amd/quartet/failover.c
index 139862c767..1738e908d9 100644
--- a/src/mainboard/amd/quartet/failover.c
+++ b/src/mainboard/amd/quartet/failover.c
@@ -9,6 +9,7 @@
#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/reset_test.c"
static unsigned long main(unsigned long bist)
@@ -21,11 +22,11 @@ static unsigned long main(unsigned long bist)
nodeid = lapicid() & 0xf;
/* Is this a cpu only reset? */
- if (cpu_init_detected(nodeid)) {
+ if (early_mtrr_init_detected()) {
if (last_boot_normal()) {
goto normal_image;
} else {
- goto cpu_reset;
+ goto fallback_image;
}
}
/* Is this a secondary cpu? */
@@ -62,12 +63,6 @@ static unsigned long main(unsigned long bist)
: "a" (bist) /* inputs */
: /* clobbers */
);
- cpu_reset:
- asm volatile ("jmp __cpu_reset"
- : /* outputs */
- : "a"(bist) /* inputs */
- : /* clobbers */
- );
fallback_image:
return bist;
}
diff --git a/src/mainboard/amd/serenade/failover.c b/src/mainboard/amd/serenade/failover.c
index 139862c767..1738e908d9 100644
--- a/src/mainboard/amd/serenade/failover.c
+++ b/src/mainboard/amd/serenade/failover.c
@@ -9,6 +9,7 @@
#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/reset_test.c"
static unsigned long main(unsigned long bist)
@@ -21,11 +22,11 @@ static unsigned long main(unsigned long bist)
nodeid = lapicid() & 0xf;
/* Is this a cpu only reset? */
- if (cpu_init_detected(nodeid)) {
+ if (early_mtrr_init_detected()) {
if (last_boot_normal()) {
goto normal_image;
} else {
- goto cpu_reset;
+ goto fallback_image;
}
}
/* Is this a secondary cpu? */
@@ -62,12 +63,6 @@ static unsigned long main(unsigned long bist)
: "a" (bist) /* inputs */
: /* clobbers */
);
- cpu_reset:
- asm volatile ("jmp __cpu_reset"
- : /* outputs */
- : "a"(bist) /* inputs */
- : /* clobbers */
- );
fallback_image:
return bist;
}
diff --git a/src/mainboard/amd/solo/failover.c b/src/mainboard/amd/solo/failover.c
index 139862c767..1738e908d9 100644
--- a/src/mainboard/amd/solo/failover.c
+++ b/src/mainboard/amd/solo/failover.c
@@ -9,6 +9,7 @@
#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/reset_test.c"
static unsigned long main(unsigned long bist)
@@ -21,11 +22,11 @@ static unsigned long main(unsigned long bist)
nodeid = lapicid() & 0xf;
/* Is this a cpu only reset? */
- if (cpu_init_detected(nodeid)) {
+ if (early_mtrr_init_detected()) {
if (last_boot_normal()) {
goto normal_image;
} else {
- goto cpu_reset;
+ goto fallback_image;
}
}
/* Is this a secondary cpu? */
@@ -62,12 +63,6 @@ static unsigned long main(unsigned long bist)
: "a" (bist) /* inputs */
: /* clobbers */
);
- cpu_reset:
- asm volatile ("jmp __cpu_reset"
- : /* outputs */
- : "a"(bist) /* inputs */
- : /* clobbers */
- );
fallback_image:
return bist;
}
diff --git a/src/mainboard/arima/hdama/failover.c b/src/mainboard/arima/hdama/failover.c
index 139862c767..a8d22e9cf0 100644
--- a/src/mainboard/arima/hdama/failover.c
+++ b/src/mainboard/arima/hdama/failover.c
@@ -25,7 +25,7 @@ static unsigned long main(unsigned long bist)
if (last_boot_normal()) {
goto normal_image;
} else {
- goto cpu_reset;
+ goto fallback_image;
}
}
/* Is this a secondary cpu? */
@@ -62,12 +62,6 @@ static unsigned long main(unsigned long bist)
: "a" (bist) /* inputs */
: /* clobbers */
);
- cpu_reset:
- asm volatile ("jmp __cpu_reset"
- : /* outputs */
- : "a"(bist) /* inputs */
- : /* clobbers */
- );
fallback_image:
return bist;
}
diff --git a/src/mainboard/ibm/e325/failover.c b/src/mainboard/ibm/e325/failover.c
index ed5ce32d81..acea55ce35 100644
--- a/src/mainboard/ibm/e325/failover.c
+++ b/src/mainboard/ibm/e325/failover.c
@@ -9,6 +9,7 @@
#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/reset_test.c"
static unsigned long main(unsigned long bist)
@@ -20,11 +21,11 @@ static unsigned long main(unsigned long bist)
nodeid = lapicid() & 0xf;
/* Is this a cpu only reset? */
- if (cpu_init_detected(nodeid)) {
+ if (early_mtrr_init_detected()) {
if (last_boot_normal()) {
goto normal_image;
} else {
- goto cpu_reset;
+ goto fallback_image;
}
}
/* Is this a secondary cpu? */
@@ -61,12 +62,6 @@ static unsigned long main(unsigned long bist)
: "a" (bist) /* inputs */
: /* clobbers */
);
- cpu_reset:
- asm volatile ("jmp __cpu_reset"
- : /* outputs */
- : "a"(bist) /* inputs */
- : /* clobbers */
- );
fallback_image:
return bist;
}
diff --git a/src/mainboard/ibm/e326/failover.c b/src/mainboard/ibm/e326/failover.c
index ed5ce32d81..acea55ce35 100644
--- a/src/mainboard/ibm/e326/failover.c
+++ b/src/mainboard/ibm/e326/failover.c
@@ -9,6 +9,7 @@
#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/reset_test.c"
static unsigned long main(unsigned long bist)
@@ -20,11 +21,11 @@ static unsigned long main(unsigned long bist)
nodeid = lapicid() & 0xf;
/* Is this a cpu only reset? */
- if (cpu_init_detected(nodeid)) {
+ if (early_mtrr_init_detected()) {
if (last_boot_normal()) {
goto normal_image;
} else {
- goto cpu_reset;
+ goto fallback_image;
}
}
/* Is this a secondary cpu? */
@@ -61,12 +62,6 @@ static unsigned long main(unsigned long bist)
: "a" (bist) /* inputs */
: /* clobbers */
);
- cpu_reset:
- asm volatile ("jmp __cpu_reset"
- : /* outputs */
- : "a"(bist) /* inputs */
- : /* clobbers */
- );
fallback_image:
return bist;
}
diff --git a/src/mainboard/island/aruma/failover.c b/src/mainboard/island/aruma/failover.c
index 5d5e7e9bba..16a5c9a904 100644
--- a/src/mainboard/island/aruma/failover.c
+++ b/src/mainboard/island/aruma/failover.c
@@ -9,6 +9,7 @@
#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/reset_test.c"
static unsigned long main(unsigned long bist)
@@ -19,11 +20,11 @@ static unsigned long main(unsigned long bist)
nodeid=lapicid();
/* Is this a cpu only reset? */
- if (cpu_init_detected(nodeid)) {
+ if (early_mtrr_init_detected()) {
if (last_boot_normal()) {
goto normal_image;
} else {
- goto cpu_reset;
+ goto fallback_image;
}
}
/* Is this a secondary cpu? */
@@ -60,12 +61,6 @@ static unsigned long main(unsigned long bist)
: "a" (bist) /* inputs */
: /* clobbers */
);
- cpu_reset:
- asm volatile ("jmp __cpu_reset"
- : /* outputs */
- : "a"(bist) /* inputs */
- : /* clobbers */
- );
fallback_image:
return bist;
}
diff --git a/src/mainboard/newisys/khepri/failover.c b/src/mainboard/newisys/khepri/failover.c
index 5d5e7e9bba..16a5c9a904 100644
--- a/src/mainboard/newisys/khepri/failover.c
+++ b/src/mainboard/newisys/khepri/failover.c
@@ -9,6 +9,7 @@
#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/reset_test.c"
static unsigned long main(unsigned long bist)
@@ -19,11 +20,11 @@ static unsigned long main(unsigned long bist)
nodeid=lapicid();
/* Is this a cpu only reset? */
- if (cpu_init_detected(nodeid)) {
+ if (early_mtrr_init_detected()) {
if (last_boot_normal()) {
goto normal_image;
} else {
- goto cpu_reset;
+ goto fallback_image;
}
}
/* Is this a secondary cpu? */
@@ -60,12 +61,6 @@ static unsigned long main(unsigned long bist)
: "a" (bist) /* inputs */
: /* clobbers */
);
- cpu_reset:
- asm volatile ("jmp __cpu_reset"
- : /* outputs */
- : "a"(bist) /* inputs */
- : /* clobbers */
- );
fallback_image:
return bist;
}
diff --git a/src/mainboard/tyan/s2875/failover.c b/src/mainboard/tyan/s2875/failover.c
index a993aedb86..ebc5a5da9e 100644
--- a/src/mainboard/tyan/s2875/failover.c
+++ b/src/mainboard/tyan/s2875/failover.c
@@ -9,6 +9,7 @@
#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/reset_test.c"
#if CONFIG_LOGICAL_CPUS==1
@@ -18,27 +19,15 @@
static unsigned long main(unsigned long bist)
{
-#if CONFIG_LOGICAL_CPUS==1
- struct node_core_id id;
-#else
- unsigned nodeid;
-#endif
/* Make cerain my local apic is useable */
enable_lapic();
-#if CONFIG_LOGICAL_CPUS==1
- id = get_node_core_id_x();
/* Is this a cpu only reset? */
- if (cpu_init_detected(id.nodeid)) {
-#else
- nodeid = lapicid();
- /* Is this a cpu only reset? */
- if (cpu_init_detected(nodeid)) {
-#endif
+ if (early_mtrr_init_detected()) {
if (last_boot_normal()) {
goto normal_image;
} else {
- goto cpu_reset;
+ goto fallback_image;
}
}
/* Is this a secondary cpu? */
@@ -75,14 +64,6 @@ static unsigned long main(unsigned long bist)
: "a" (bist) /* inputs */
: /* clobbers */
);
- cpu_reset:
-#if 0
- asm volatile ("jmp __cpu_reset"
- : /* outputs */
- : "a"(bist) /* inputs */
- : /* clobbers */
- );
-#endif
fallback_image:
return bist;
}
diff --git a/src/mainboard/tyan/s2880/failover.c b/src/mainboard/tyan/s2880/failover.c
index 9164e7b091..6b7eda80be 100644
--- a/src/mainboard/tyan/s2880/failover.c
+++ b/src/mainboard/tyan/s2880/failover.c
@@ -9,6 +9,7 @@
#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/reset_test.c"
#if CONFIG_LOGICAL_CPUS==1
@@ -18,27 +19,15 @@
static unsigned long main(unsigned long bist)
{
-#if CONFIG_LOGICAL_CPUS==1
- struct node_core_id id;
-#else
- unsigned nodeid;
-#endif
/* Make cerain my local apic is useable */
enable_lapic();
-#if CONFIG_LOGICAL_CPUS==1
- id = get_node_core_id_x();
/* Is this a cpu only reset? */
- if (cpu_init_detected(id.nodeid)) {
-#else
- nodeid = lapicid();
- /* Is this a cpu only reset? */
- if (cpu_init_detected(nodeid)) {
-#endif
+ if (early_mtrr_init_detected()) {
if (last_boot_normal()) {
goto normal_image;
} else {
- goto cpu_reset;
+ goto fallback_image;
}
}
/* Is this a secondary cpu? */
@@ -74,14 +63,6 @@ static unsigned long main(unsigned long bist)
: "a" (bist) /* inputs */
: /* clobbers */
);
- cpu_reset:
-#if 0
- asm volatile ("jmp __cpu_reset"
- : /* outputs */
- : "a"(bist) /* inputs */
- : /* clobbers */
- );
-#endif
fallback_image:
return bist;
}
diff --git a/src/mainboard/tyan/s2881/failover.c b/src/mainboard/tyan/s2881/failover.c
index a993aedb86..ebc5a5da9e 100644
--- a/src/mainboard/tyan/s2881/failover.c
+++ b/src/mainboard/tyan/s2881/failover.c
@@ -9,6 +9,7 @@
#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/reset_test.c"
#if CONFIG_LOGICAL_CPUS==1
@@ -18,27 +19,15 @@
static unsigned long main(unsigned long bist)
{
-#if CONFIG_LOGICAL_CPUS==1
- struct node_core_id id;
-#else
- unsigned nodeid;
-#endif
/* Make cerain my local apic is useable */
enable_lapic();
-#if CONFIG_LOGICAL_CPUS==1
- id = get_node_core_id_x();
/* Is this a cpu only reset? */
- if (cpu_init_detected(id.nodeid)) {
-#else
- nodeid = lapicid();
- /* Is this a cpu only reset? */
- if (cpu_init_detected(nodeid)) {
-#endif
+ if (early_mtrr_init_detected()) {
if (last_boot_normal()) {
goto normal_image;
} else {
- goto cpu_reset;
+ goto fallback_image;
}
}
/* Is this a secondary cpu? */
@@ -75,14 +64,6 @@ static unsigned long main(unsigned long bist)
: "a" (bist) /* inputs */
: /* clobbers */
);
- cpu_reset:
-#if 0
- asm volatile ("jmp __cpu_reset"
- : /* outputs */
- : "a"(bist) /* inputs */
- : /* clobbers */
- );
-#endif
fallback_image:
return bist;
}
diff --git a/src/mainboard/tyan/s2882/failover.c b/src/mainboard/tyan/s2882/failover.c
index 9164e7b091..6b7eda80be 100644
--- a/src/mainboard/tyan/s2882/failover.c
+++ b/src/mainboard/tyan/s2882/failover.c
@@ -9,6 +9,7 @@
#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/reset_test.c"
#if CONFIG_LOGICAL_CPUS==1
@@ -18,27 +19,15 @@
static unsigned long main(unsigned long bist)
{
-#if CONFIG_LOGICAL_CPUS==1
- struct node_core_id id;
-#else
- unsigned nodeid;
-#endif
/* Make cerain my local apic is useable */
enable_lapic();
-#if CONFIG_LOGICAL_CPUS==1
- id = get_node_core_id_x();
/* Is this a cpu only reset? */
- if (cpu_init_detected(id.nodeid)) {
-#else
- nodeid = lapicid();
- /* Is this a cpu only reset? */
- if (cpu_init_detected(nodeid)) {
-#endif
+ if (early_mtrr_init_detected()) {
if (last_boot_normal()) {
goto normal_image;
} else {
- goto cpu_reset;
+ goto fallback_image;
}
}
/* Is this a secondary cpu? */
@@ -74,14 +63,6 @@ static unsigned long main(unsigned long bist)
: "a" (bist) /* inputs */
: /* clobbers */
);
- cpu_reset:
-#if 0
- asm volatile ("jmp __cpu_reset"
- : /* outputs */
- : "a"(bist) /* inputs */
- : /* clobbers */
- );
-#endif
fallback_image:
return bist;
}
diff --git a/src/mainboard/tyan/s2885/failover.c b/src/mainboard/tyan/s2885/failover.c
index 345d3f4d1a..abd2042cd8 100644
--- a/src/mainboard/tyan/s2885/failover.c
+++ b/src/mainboard/tyan/s2885/failover.c
@@ -9,6 +9,7 @@
#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/reset_test.c"
#if CONFIG_LOGICAL_CPUS==1
@@ -19,29 +20,13 @@
static unsigned long main(unsigned long bist)
{
-#if CONFIG_LOGICAL_CPUS==1
- struct node_core_id id;
-#else
- unsigned nodeid;
-#endif
- /* Make cerain my local apic is useable */
-// enable_lapic();
-
-#if CONFIG_LOGICAL_CPUS==1
- id = get_node_core_id_x();
- /* Is this a cpu only reset? */
- if (cpu_init_detected(id.nodeid)) {
-#else
-// nodeid = lapicid() & 0xf;
- nodeid = get_node_id();
/* Is this a cpu only reset? */
- if (cpu_init_detected(nodeid)) {
-#endif
+ if (early_mtrr_init_detected()) {
/* Is this a cpu only reset? */
if (last_boot_normal()) {
goto normal_image;
} else {
- goto cpu_reset;
+ goto fallback_image;
}
}
/* Is this a secondary cpu? */
@@ -77,14 +62,6 @@ static unsigned long main(unsigned long bist)
: "a" (bist) /* inputs */
: /* clobbers */
);
- cpu_reset:
-#if 0
- asm volatile ("jmp __cpu_reset"
- : /* outputs */
- : "a"(bist) /* inputs */
- : /* clobbers */
- );
-#endif
fallback_image:
return bist;
}
diff --git a/src/mainboard/tyan/s2891/failover.c b/src/mainboard/tyan/s2891/failover.c
index 98b01b8f79..1ec4137b5a 100644
--- a/src/mainboard/tyan/s2891/failover.c
+++ b/src/mainboard/tyan/s2891/failover.c
@@ -10,6 +10,7 @@
#include "southbridge/nvidia/ck804/ck804_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/reset_test.c"
static void sio_setup(void)
@@ -42,27 +43,15 @@ static void sio_setup(void)
static unsigned long main(unsigned long bist)
{
-#if CONFIG_LOGICAL_CPUS==1
- struct node_core_id id;
-#else
- unsigned nodeid;
-#endif
/* Make cerain my local apic is useable */
enable_lapic();
-#if CONFIG_LOGICAL_CPUS==1
- id = get_node_core_id_x();
/* Is this a cpu only reset? */
- if (cpu_init_detected(id.nodeid)) {
-#else
- nodeid = lapicid();
- /* Is this a cpu only reset? */
- if (cpu_init_detected(nodeid)) {
-#endif
+ if (early_mtrr_init_detected(nodeid)) {
if (last_boot_normal()) {
goto normal_image;
} else {
- goto cpu_reset;
+ goto fallback_image;
}
}
@@ -102,15 +91,6 @@ static unsigned long main(unsigned long bist)
: "a" (bist) /* inputs */
: /* clobbers */
);
- cpu_reset:
-#if 0
- //CPU reset will reset memtroller ???
- asm volatile ("jmp __cpu_reset"
- : /* outputs */
- : "a"(bist) /* inputs */
- : /* clobbers */
- );
-#endif
fallback_image:
return bist;
diff --git a/src/mainboard/tyan/s2892/failover.c b/src/mainboard/tyan/s2892/failover.c
index b8d21f1d93..2d90e37cdd 100644
--- a/src/mainboard/tyan/s2892/failover.c
+++ b/src/mainboard/tyan/s2892/failover.c
@@ -10,6 +10,7 @@
#include "southbridge/nvidia/ck804/ck804_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/reset_test.c"
static void sio_setup(void)
@@ -36,27 +37,15 @@ static void sio_setup(void)
static unsigned long main(unsigned long bist)
{
-#if CONFIG_LOGICAL_CPUS==1
- struct node_core_id id;
-#else
- unsigned nodeid;
-#endif
/* Make cerain my local apic is useable */
enable_lapic();
-#if CONFIG_LOGICAL_CPUS==1
- id = get_node_core_id_x();
/* Is this a cpu only reset? */
- if (cpu_init_detected(id.nodeid)) {
-#else
- nodeid = lapicid();
- /* Is this a cpu only reset? */
- if (cpu_init_detected(nodeid)) {
-#endif
+ if (early_mtrr_init_detected()) {
if (last_boot_normal()) {
goto normal_image;
} else {
- goto cpu_reset;
+ goto fallback_image;
}
}
@@ -96,16 +85,6 @@ static unsigned long main(unsigned long bist)
: "a" (bist) /* inputs */
: /* clobbers */
);
- cpu_reset:
-#if 0
- //CPU reset will reset memtroller ???
- asm volatile ("jmp __cpu_reset"
- : /* outputs */
- : "a"(bist) /* inputs */
- : /* clobbers */
- );
-#endif
-
fallback_image:
return bist;
}
diff --git a/src/mainboard/tyan/s2895/failover.c b/src/mainboard/tyan/s2895/failover.c
index 7cd004f82b..537abd43f4 100644
--- a/src/mainboard/tyan/s2895/failover.c
+++ b/src/mainboard/tyan/s2895/failover.c
@@ -13,6 +13,7 @@
#include "southbridge/nvidia/ck804/ck804_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/reset_test.c"
#include "superio/smsc/lpc47b397/lpc47b397_early_serial.c"
@@ -59,27 +60,12 @@ static void sio_setup(void)
static unsigned long main(unsigned long bist)
{
-#if CONFIG_LOGICAL_CPUS==1
- struct node_core_id id;
-#else
- unsigned nodeid;
-#endif
- /* Make cerain my local apic is useable */
-// enable_lapic();
-
-#if CONFIG_LOGICAL_CPUS==1
- id = get_node_core_id_x();
- /* Is this a cpu only reset? */
- if (cpu_init_detected(id.nodeid)) {
-#else
- nodeid = get_node_id();
/* Is this a cpu only reset? */
- if (cpu_init_detected(nodeid)) {
-#endif
+ if (early_mtrr_init_detected()) {
if (last_boot_normal()) {
goto normal_image;
} else {
- goto cpu_reset;
+ goto fallback_image;
}
}
@@ -119,16 +105,6 @@ static unsigned long main(unsigned long bist)
: "a" (bist) /* inputs */
: /* clobbers */
);
- cpu_reset:
-#if 0
- //CPU reset will reset memtroller ???
- asm volatile ("jmp __cpu_reset"
- : /* outputs */
- : "a"(bist) /* inputs */
- : /* clobbers */
- );
-#endif
-
fallback_image:
return bist;
}
diff --git a/src/mainboard/tyan/s4880/failover.c b/src/mainboard/tyan/s4880/failover.c
index 39758aefa7..c347af32dd 100644
--- a/src/mainboard/tyan/s4880/failover.c
+++ b/src/mainboard/tyan/s4880/failover.c
@@ -9,6 +9,7 @@
#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/reset_test.c"
#if CONFIG_LOGICAL_CPUS==1
@@ -18,27 +19,15 @@
static unsigned long main(unsigned long bist)
{
-#if CONFIG_LOGICAL_CPUS==1
- struct node_core_id id;
-#else
- unsigned nodeid;
-#endif
/* Make cerain my local apic is useable */
enable_lapic();
-#if CONFIG_LOGICAL_CPUS==1
- id = get_node_core_id_x();
- /* Is this a cpu only reset? */
- if (cpu_init_detected(id.nodeid)) {
-#else
- nodeid = lapicid();
/* Is this a cpu only reset? */
- if (cpu_init_detected(nodeid)) {
-#endif
+ if (early_mtrr_init_detected()) {
if (last_boot_normal()) {
goto normal_image;
} else {
- goto cpu_reset;
+ goto fallback_image;
}
}
/* Is this a secondary cpu? */
@@ -75,14 +64,6 @@ static unsigned long main(unsigned long bist)
: "a" (bist) /* inputs */
: /* clobbers */
);
- cpu_reset:
-#if 0
- asm volatile ("jmp __cpu_reset"
- : /* outputs */
- : "a"(bist) /* inputs */
- : /* clobbers */
- );
-#endif
fallback_image:
return bist;
}
diff --git a/src/mainboard/tyan/s4882/failover.c b/src/mainboard/tyan/s4882/failover.c
index 9d793f447f..77e9851410 100644
--- a/src/mainboard/tyan/s4882/failover.c
+++ b/src/mainboard/tyan/s4882/failover.c
@@ -9,6 +9,7 @@
#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
#include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
#include "northbridge/amd/amdk8/reset_test.c"
#if CONFIG_LOGICAL_CPUS==1
@@ -20,28 +21,13 @@
static unsigned long main(unsigned long bist)
{
-#if CONFIG_LOGICAL_CPUS==1
- struct node_core_id id;
-#else
- unsigned nodeid;
-#endif
- /* Make cerain my local apic is useable */
-// enable_lapic();
-#if CONFIG_LOGICAL_CPUS==1
- id = get_node_core_id_x();
- /* Is this a cpu only reset? */
- if (cpu_init_detected(id.nodeid)) {
-#else
-// nodeid = lapicid() & 0xf;
- nodeid = get_node_id();
/* Is this a cpu only reset? */
- if (cpu_init_detected(nodeid)) {
-#endif
+ if (early_mtrr_init_detected()) {
if (last_boot_normal()) {
goto normal_image;
} else {
- goto cpu_reset;
+ goto fallback_image;
}
}
/* Is this a secondary cpu? */
@@ -77,14 +63,6 @@ static unsigned long main(unsigned long bist)
: "a" (bist) /* inputs */
: /* clobbers */
);
- cpu_reset:
-#if 0
- asm volatile ("jmp __cpu_reset"
- : /* outputs */
- : "a"(bist) /* inputs */
- : /* clobbers */
- );
-#endif
fallback_image:
return bist;
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-05 16:05:24 +0000