diff options
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/asrock/g41c-gs/romstage.c | 3 | ||||
| -rw-r--r-- | src/mainboard/foxconn/g41s-k/romstage.c | 3 | ||||
| -rw-r--r-- | src/mainboard/gigabyte/ga-g41m-es2l/romstage.c | 3 | ||||
| -rw-r--r-- | src/mainboard/intel/dg43gt/romstage.c | 3 |
4 files changed, 0 insertions, 12 deletions
diff --git a/src/mainboard/asrock/g41c-gs/romstage.c b/src/mainboard/asrock/g41c-gs/romstage.c index dd885db94d..24a5cfde39 100644 --- a/src/mainboard/asrock/g41c-gs/romstage.c +++ b/src/mainboard/asrock/g41c-gs/romstage.c @@ -87,9 +87,6 @@ void mainboard_romstage_entry(unsigned long bist) timestamp_init(get_initial_timestamp()); timestamp_add_now(TS_START_ROMSTAGE); - /* Disable watchdog timer */ - RCBA32(0x3410) = RCBA32(0x3410) | 0x20; - /* Set southbridge and Super I/O GPIOs. */ ich7_enable_lpc(); mb_lpc_setup(); diff --git a/src/mainboard/foxconn/g41s-k/romstage.c b/src/mainboard/foxconn/g41s-k/romstage.c index 2a704a3c66..ba07e45e99 100644 --- a/src/mainboard/foxconn/g41s-k/romstage.c +++ b/src/mainboard/foxconn/g41s-k/romstage.c @@ -91,9 +91,6 @@ void mainboard_romstage_entry(unsigned long bist) timestamp_init(get_initial_timestamp()); timestamp_add_now(TS_START_ROMSTAGE); - /* Disable watchdog timer. */ - RCBA32(GCS) = RCBA32(GCS) | 0x20; - /* Set up southbridge and Super I/O GPIOs. */ ich7_enable_lpc(); mb_lpc_setup(); diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c index 67d3eb1310..e71e00cf52 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c +++ b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c @@ -140,9 +140,6 @@ void mainboard_romstage_entry(unsigned long bist) timestamp_init(get_initial_timestamp()); timestamp_add_now(TS_START_ROMSTAGE); - /* Disable watchdog timer */ - RCBA32(0x3410) = RCBA32(0x3410) | 0x20; - /* Set southbridge and Super I/O GPIOs. */ ich7_enable_lpc(); mb_gpio_init(); diff --git a/src/mainboard/intel/dg43gt/romstage.c b/src/mainboard/intel/dg43gt/romstage.c index 6944b1819e..d3b2b6aec4 100644 --- a/src/mainboard/intel/dg43gt/romstage.c +++ b/src/mainboard/intel/dg43gt/romstage.c @@ -75,9 +75,6 @@ void mainboard_romstage_entry(unsigned long bist) timestamp_init(get_initial_timestamp()); timestamp_add_now(TS_START_ROMSTAGE); - /* Disable watchdog timer */ - RCBA32(0x3410) = RCBA32(0x3410) | 0x20; - /* Set southbridge and Super I/O GPIOs. */ ich10_enable_lpc(); mb_gpio_init(); |