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-rw-r--r--src/mainboard/google/dedede/variants/baseboard/devicetree.cb3
-rw-r--r--src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb3
2 files changed, 0 insertions, 6 deletions
diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
index c23717eabc..1f72eb1432 100644
--- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
@@ -155,9 +155,6 @@ chip soc/intel/jasperlake
.tdp_pl2_override = 20,
}"
- # Enable processor thermal control
- register "Device4Enable" = "1"
-
register "tcc_offset" = "10" # TCC of 90C
# chipset_lockdown configuration
diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
index 035ccbd301..f8fea47aa5 100644
--- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
+++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb
@@ -128,9 +128,6 @@ chip soc/intel/jasperlake
# Enable DPTF
register "dptf_enable" = "1"
- # Enable Processor Thermal Control
- register "Device4Enable" = "1"
-
# Add PL1 and PL2 values
register "power_limits_config" = "{
.tdp_pl1_override = 6,