1 files changed, 41 insertions, 0 deletions
diff --git a/src/mainboard/google/octopus/mainboard.c b/src/mainboard/google/octopus/mainboard.c
index 5c10d94672..61baa33f4b 100644
--- a/src/mainboard/google/octopus/mainboard.c
+++ b/src/mainboard/google/octopus/mainboard.c
@@ -19,6 +19,8 @@
 #include <compiler.h>
 #include <console/console.h>
 #include <device/device.h>
+#include <device/pci_def.h>
+#include <device/pci_ops.h>
 #include <ec/google/chromeec/ec.h>
 #include <ec/ec.h>
 #include <nhlt.h>
@@ -26,11 +28,28 @@
 #include <soc/cpu.h>
 #include <soc/gpio.h>
 #include <soc/nhlt.h>
+#include <soc/pci_devs.h>
+#include <stdint.h>
 #include <string.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include <variant/ec.h>
 #include <variant/gpio.h>
 
+static bool is_cnvi_held_in_reset(void)
+{
+	struct device *dev = dev_find_slot(0, PCH_DEVFN_CNVI);
+	uint32_t reg = pci_read_config32(dev, PCI_VENDOR_ID);
+
+	/*
+	 * If vendor/device ID for CNVi reads as 0xffffffff, then it is safe to
+	 * assume that it is being held in reset.
+	 */
+	if (reg == 0xffffffff)
+		return true;
+
+	return false;
+}
+
 static void mainboard_init(void *chip_info)
 {
 	int boardid;
@@ -122,8 +141,30 @@ void __weak variant_update_devtree(struct device *dev)
 	/* Place holder for common updates. */
 }
 
+/*
+ * Check if CNVi PCI device is released from reset. If yes, then the system is
+ * booting with CNVi module. In this case, the PCIe device for WiFi needs to
+ * be disabled. If CNVi device is held in reset, then disable it.
+ */
+static void wifi_device_update(void)
+{
+	struct device *dev;
+	unsigned int devfn;
+
+	if (is_cnvi_held_in_reset())
+		devfn = PCH_DEVFN_CNVI;
+	else
+		devfn = PCH_DEVFN_PCIE1;
+
+	dev = dev_find_slot(0, devfn);
+	dev->enabled = 0;
+}
+
 void mainboard_devtree_update(struct device *dev)
 {
+	/* Apply common devtree updates. */
+	wifi_device_update();
+
 	/* Defer to variant for board-specific updates. */
 	variant_update_devtree(dev);
 }