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-rw-r--r--src/mainboard/google/rambi/Makefile.inc1
-rw-r--r--src/mainboard/google/rambi/acpi/ec.asl57
-rw-r--r--src/mainboard/google/rambi/acpi/mainboard.asl20
-rw-r--r--src/mainboard/google/rambi/acpi/platform.asl73
-rw-r--r--src/mainboard/google/rambi/dsdt.asl7
-rw-r--r--src/mainboard/google/rambi/irqroute.c22
-rw-r--r--src/mainboard/google/rambi/irqroute.h47
7 files changed, 110 insertions, 117 deletions
diff --git a/src/mainboard/google/rambi/Makefile.inc b/src/mainboard/google/rambi/Makefile.inc
index 77b2f2cb73..1b15ad7adf 100644
--- a/src/mainboard/google/rambi/Makefile.inc
+++ b/src/mainboard/google/rambi/Makefile.inc
@@ -23,5 +23,6 @@ romstage-$(CONFIG_CHROMEOS) += chromeos.c
ramstage-$(CONFIG_CHROMEOS) += chromeos.c
ramstage-$(CONFIG_CHROMEOS) += gpio.c
ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC) += ec.c
+ramstage-y += irqroute.c
smm-$(CONFIG_HAVE_SMI_HANDLER) += mainboard_smi.c
diff --git a/src/mainboard/google/rambi/acpi/ec.asl b/src/mainboard/google/rambi/acpi/ec.asl
index 9ae5951aca..9a4cd4a1a8 100644
--- a/src/mainboard/google/rambi/acpi/ec.asl
+++ b/src/mainboard/google/rambi/acpi/ec.asl
@@ -1,37 +1,24 @@
-Device (EC0)
-{
- Name (_HID, EISAID ("PNP0C09"))
- Name (_UID, 1)
- Name (_GPE, 10) // GPIO 10 is SMC_RUNTIME_SCI_N
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2012 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
- OperationRegion (ERAM, EmbeddedControl, 0x00, 0xff)
- Field (ERAM, ByteAcc, Lock, Preserve)
- {
- Offset (0x03),
- ACPR, 1, // AC Power (1=present)
- , 2,
- CFAN, 1, // CPU Fan (1=on)
- , 2,
- LIDS, 1, // Lid State (1=open)
- , 1,
- SPTR, 8, // SMBUS Protocol Register
- SSTS, 8, // SMBUS Status Register
- SADR, 8, // SMBUS Address Register
- SCMD, 8, // SMBUS Command Register
- SBFR, 256, // SMBUS Block Buffer
- SCNT, 8, // SMBUS Block Count
+/* mainboard configuration */
+#include <mainboard/google/rambi/ec.h>
- Offset (0x3a),
- ECMD, 8, // EC Command Register
-
- Offset (0x82),
- PECL, 8, // PECI fractional (1/64 Celsius)
- PECH, 8, // PECI integer (Celsius)
- }
-
- Name (_CRS, ResourceTemplate()
- {
- IO (Decode16, 0x62, 0x62, 0, 1)
- IO (Decode16, 0x66, 0x66, 0, 1)
- })
-}
+/* ACPI code for EC functions */
+#include <ec/google/chromeec/acpi/ec.asl>
diff --git a/src/mainboard/google/rambi/acpi/mainboard.asl b/src/mainboard/google/rambi/acpi/mainboard.asl
index 3e0eb339ee..948d7dfe87 100644
--- a/src/mainboard/google/rambi/acpi/mainboard.asl
+++ b/src/mainboard/google/rambi/acpi/mainboard.asl
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2011 Google Inc.
+ * Copyright (C) 2012 Google Inc.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
@@ -19,10 +19,20 @@
* MA 02110-1301 USA
*/
-Device (PWRB)
+Scope (\_SB)
{
- Name(_HID, EisaId("PNP0C0C"))
+ Device (LID0)
+ {
+ Name(_HID, EisaId("PNP0C0D"))
+ Method(_LID, 0)
+ {
+ Store (\_SB.PCI0.LPCB.EC0.LIDS, \LIDS)
+ Return (\LIDS)
+ }
+ }
- // Wake from deep sleep via GPIO27
- Name(_PRW, Package(){27, 4})
+ Device (PWRB)
+ {
+ Name(_HID, EisaId("PNP0C0C"))
+ }
}
diff --git a/src/mainboard/google/rambi/acpi/platform.asl b/src/mainboard/google/rambi/acpi/platform.asl
deleted file mode 100644
index e0693928fa..0000000000
--- a/src/mainboard/google/rambi/acpi/platform.asl
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- * Copyright (C) 2012 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-/* The APM port can be used for generating software SMIs */
-
-OperationRegion (APMP, SystemIO, 0xb2, 2)
-Field (APMP, ByteAcc, NoLock, Preserve)
-{
- APMC, 8, // APM command
- APMS, 8 // APM status
-}
-
-/* Port 80 POST */
-
-OperationRegion (POST, SystemIO, 0x80, 1)
-Field (POST, ByteAcc, Lock, Preserve)
-{
- DBG0, 8
-}
-
-/* SMI I/O Trap */
-Method(TRAP, 1, Serialized)
-{
- Store (Arg0, SMIF) // SMI Function
- Store (0, TRP0) // Generate trap
- Return (SMIF) // Return value of SMI handler
-}
-
-/* The _PIC method is called by the OS to choose between interrupt
- * routing via the i8259 interrupt controller or the APIC.
- *
- * _PIC is called with a parameter of 0 for i8259 configuration and
- * with a parameter of 1 for Local Apic/IOAPIC configuration.
- */
-
-Method(_PIC, 1)
-{
- // Remember the OS' IRQ routing choice.
- Store(Arg0, PICM)
-}
-
-/* The _PTS method (Prepare To Sleep) is called before the OS is
- * entering a sleep state. The sleep state number is passed in Arg0
- */
-
-Method(_PTS,1)
-{
-}
-
-/* The _WAK method is called on system wakeup */
-
-Method(_WAK,1)
-{
- Return(Package(){0,0})
-}
-
diff --git a/src/mainboard/google/rambi/dsdt.asl b/src/mainboard/google/rambi/dsdt.asl
index 55e44b586e..1fbb8eb537 100644
--- a/src/mainboard/google/rambi/dsdt.asl
+++ b/src/mainboard/google/rambi/dsdt.asl
@@ -18,8 +18,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#include <soc/intel/baytrail/baytrail/iomap.h>
-
#define ENABLE_TPM
DefinitionBlock(
@@ -32,14 +30,15 @@ DefinitionBlock(
)
{
// Some generic macros
- #include "acpi/platform.asl"
+ #include <soc/intel/baytrail/acpi/platform.asl>
+ #include "acpi/mainboard.asl"
// global NVS and variables
#include <soc/intel/baytrail/acpi/globalnvs.asl>
//#include "acpi/thermal.asl"
- //#include <soc/intel/baytrail/acpi/cpu.asl>
+ #include <soc/intel/baytrail/acpi/cpu.asl>
Scope (\_SB) {
Device (PCI0)
diff --git a/src/mainboard/google/rambi/irqroute.c b/src/mainboard/google/rambi/irqroute.c
new file mode 100644
index 0000000000..552be8f605
--- /dev/null
+++ b/src/mainboard/google/rambi/irqroute.c
@@ -0,0 +1,22 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include "irqroute.h"
+
+DEFINE_IRQ_ROUTES;
diff --git a/src/mainboard/google/rambi/irqroute.h b/src/mainboard/google/rambi/irqroute.h
new file mode 100644
index 0000000000..20f421b5b8
--- /dev/null
+++ b/src/mainboard/google/rambi/irqroute.h
@@ -0,0 +1,47 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <soc/intel/baytrail/baytrail/irq.h>
+#include <soc/intel/baytrail/baytrail/pci_devs.h>
+
+#define PCI_DEV_PIRQ_ROUTES \
+ PCI_DEV_PIRQ_ROUTE(GFX_DEV, A, B, C, D), \
+ PCI_DEV_PIRQ_ROUTE(SDIO_DEV, A, B, C, D), \
+ PCI_DEV_PIRQ_ROUTE(SD_DEV, A, B, C, D), \
+ PCI_DEV_PIRQ_ROUTE(SATA_DEV, A, B, C, D), \
+ PCI_DEV_PIRQ_ROUTE(XHCI_DEV, A, B, C, D), \
+ PCI_DEV_PIRQ_ROUTE(LPE_DEV, A, B, C, D), \
+ PCI_DEV_PIRQ_ROUTE(MMC_DEV, A, B, C, D), \
+ PCI_DEV_PIRQ_ROUTE(SIO1_DEV, A, B, C, D), \
+ PCI_DEV_PIRQ_ROUTE(TXE_DEV, A, B, C, D), \
+ PCI_DEV_PIRQ_ROUTE(HDA_DEV, A, B, C, D), \
+ PCI_DEV_PIRQ_ROUTE(PCIE_DEV, A, B, C, D), \
+ PCI_DEV_PIRQ_ROUTE(EHCI_DEV, A, B, C, D), \
+ PCI_DEV_PIRQ_ROUTE(SIO2_DEV, A, B, C, D), \
+ PCI_DEV_PIRQ_ROUTE(PCU_DEV, A, B, C, D)
+
+#define PIRQ_PIC_ROUTES \
+ PIRQ_PIC(A, DISABLE), \
+ PIRQ_PIC(B, DISABLE), \
+ PIRQ_PIC(C, DISABLE), \
+ PIRQ_PIC(D, DISABLE), \
+ PIRQ_PIC(E, DISABLE), \
+ PIRQ_PIC(F, DISABLE), \
+ PIRQ_PIC(G, DISABLE), \
+ PIRQ_PIC(H, DISABLE)