diff options
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/snow/Kconfig | 23 | ||||
| -rw-r--r-- | src/mainboard/google/snow/bootblock.c | 36 | ||||
| -rw-r--r-- | src/mainboard/google/snow/romstage.c | 25 |
3 files changed, 52 insertions, 32 deletions
diff --git a/src/mainboard/google/snow/Kconfig b/src/mainboard/google/snow/Kconfig index 8f41c64a40..a0c76d6b8c 100644 --- a/src/mainboard/google/snow/Kconfig +++ b/src/mainboard/google/snow/Kconfig @@ -60,29 +60,6 @@ config BOOTBLOCK_MAINBOARD_INIT string default "mainboard/google/snow/bootblock.c" -# SPL (second-phase loader) stuff -config SPL_TEXT_BASE - hex - default 0x02023400 - help - Location of SPL. Default location is within iRAM region. - -config ROMSTAGE_BASE - hex - default SPL_TEXT_BASE - -# FIXME: increased "SPL" size to get around build issues -#config SPL_MAX_SIZE -# hex "SPL executable max size" -# default 0x3800 -# help -# Max size of SPL. Default is 14KB -config SPL_MAX_SIZE - hex - default 0x8000 - help - Max size of SPL. Let's say 32KB for now... - config DRAM_SIZE_MB int default 2048 diff --git a/src/mainboard/google/snow/bootblock.c b/src/mainboard/google/snow/bootblock.c index a025b28740..d5ee0a378a 100644 --- a/src/mainboard/google/snow/bootblock.c +++ b/src/mainboard/google/snow/bootblock.c @@ -42,8 +42,6 @@ #define EXYNOS5_CLOCK_BASE 0x10010000 -volatile unsigned long *pshold = (unsigned long *)0x1004330c; - /* FIXME(dhendrix): Can we move this SPI stuff elsewhere? */ static void spi_rx_tx(struct exynos_spi *regs, int todo, void *dinp, void const *doutp, int i) @@ -723,6 +721,9 @@ static void exynos5_uart_tx_byte(unsigned char data) // struct s5p_uart *const uart = s5p_get_base_uart(dev_index); struct s5p_uart *uart = (struct s5p_uart *)uart3_base; + if (data == '\n') + exynos5_uart_tx_byte('\r'); + /* wait for room in the tx FIFO */ while ((readl(uart->ufstat) & TX_FIFO_FULL_MASK)) { if (exynos5_uart_err_check(1)) @@ -738,12 +739,13 @@ void puts(const char *s) int n = 0; while (*s) { + if (*s == '\n') { + exynos5_uart_tx_byte(0xd); /* CR */ + } + exynos5_uart_tx_byte(*s++); n++; } - - exynos5_uart_tx_byte(0xd); /* CR */ - exynos5_uart_tx_byte(0xa); /* LF */ } static void do_serial(void) @@ -2137,10 +2139,26 @@ void bootblock_mainboard_init(void) power_init(); clock_init(); do_serial(); - printk(BIOS_INFO, "%s: hello world\n", __func__); + printk(BIOS_INFO, "%s: UART initialized\n", __func__); /* Copy romstage data from SPI ROM to SRAM */ - /* FIXME: test with something benign, then fix the offsets once - we're more confident in this */ - copy_romstage(0x2000, 0x2060000, 0x800); + printk(BIOS_INFO, "Copying romstage:\n" + "\tSPI offset: 0x%06x\n" + "\tiRAM offset: 0x%08x\n" + "\tSize: 0x%x\n", + 0, CONFIG_SPI_IMAGE_HACK, CONFIG_ROMSTAGE_SIZE); + copy_romstage(0x0, CONFIG_SPI_IMAGE_HACK, CONFIG_ROMSTAGE_SIZE); +#if 0 + /* FIXME: dump SRAM content for sanity checking */ + uint32_t u; + for (u = CONFIG_SPI_IMAGE_HACK; u < CONFIG_SPI_IMAGE_HACK + 128; u++) { + if (u % 16 == 0) + printk(BIOS_INFO, "\n0x%08x: ", u); + else + printk(BIOS_INFO, " "); + printk(BIOS_INFO, "%02x", *(uint8_t *)(u)); + } + printk(BIOS_INFO, "\n"); +#endif + printk(BIOS_INFO, "%s: finished\n", __func__); } diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c index e2af2c0c4e..45016a5434 100644 --- a/src/mainboard/google/snow/romstage.c +++ b/src/mainboard/google/snow/romstage.c @@ -21,6 +21,22 @@ #include <system.h> #include <cache.h> +#if 0 +#include <arch/io.h> + +/* FIXME: make i2c.h use standard types */ +#define uchar unsigned char +#define uint unsigned int +#include <device/i2c.h> + +#include <cpu/samsung/s5p-common/s3c24x0_i2c.h> +#include "cpu/samsung/exynos5250/dmc.h" +#include <cpu/samsung/exynos5250/power.h> +#include <cpu/samsung/exynos5250/clock_init.h> +#include <cpu/samsung/exynos5-common/uart.h> +#endif +#include <console/console.h> + static void mmu_setup(void) { dram_bank_mmu_setup(CONFIG_SYS_SDRAM_BASE, CONFIG_DRAM_SIZE_MB * 1024); @@ -29,5 +45,14 @@ static void mmu_setup(void) void main(void); void main(void) { +// volatile unsigned long *pshold = (unsigned long *)0x1004330c; +// i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); +// power_init(); +// clock_init(); +// exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE); + console_init(); + printk(BIOS_INFO, "hello from romstage\n"); + +// *pshold &= ~0x100; /* shut down */ mmu_setup(); } |