diff options
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/nyan/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/mainboard/google/nyan/romstage.c | 11 | ||||
| -rw-r--r-- | src/mainboard/google/nyan_big/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/mainboard/google/nyan_big/romstage.c | 11 | ||||
| -rw-r--r-- | src/mainboard/google/nyan_blaze/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/mainboard/google/nyan_blaze/romstage.c | 11 |
6 files changed, 36 insertions, 0 deletions
diff --git a/src/mainboard/google/nyan/Makefile.inc b/src/mainboard/google/nyan/Makefile.inc index 30cd27d9fc..b66cd555fb 100644 --- a/src/mainboard/google/nyan/Makefile.inc +++ b/src/mainboard/google/nyan/Makefile.inc @@ -32,6 +32,7 @@ bootblock-y += bootblock.c bootblock-y += pmic.c bootblock-y += reset.c +romstage-y += reset.c romstage-y += romstage.c romstage-y += sdram_configs.c romstage-$(CONFIG_CHROMEOS) += chromeos.c diff --git a/src/mainboard/google/nyan/romstage.c b/src/mainboard/google/nyan/romstage.c index b4e27330ac..4e023654e7 100644 --- a/src/mainboard/google/nyan/romstage.c +++ b/src/mainboard/google/nyan/romstage.c @@ -27,12 +27,14 @@ #include <cbmem.h> #include <console/cbmem_console.h> #include <console/console.h> +#include <mainboard/google/nyan/reset.h> #include <romstage_handoff.h> #include <vendorcode/google/chromeos/chromeos.h> #include "sdram_configs.h" #include <soc/nvidia/tegra/i2c.h> #include <soc/nvidia/tegra124/chip.h> #include <soc/nvidia/tegra124/clk_rst.h> +#include <soc/nvidia/tegra124/power.h> #include <soc/nvidia/tegra124/sdram.h> #include <soc/addressmap.h> #include <soc/clock.h> @@ -181,6 +183,15 @@ static void __attribute__((noinline)) romstage(void) mmu_disable_range(0, 1); dcache_mmu_enable(); + /* + * A watchdog reset only resets part of the system so it ends up in + * a funny state. If that happens, we need to reset the whole machine. + */ + if (power_reset_status() == POWER_RESET_WATCHDOG) { + printk(BIOS_INFO, "Watchdog reset detected, rebooting.\n"); + cpu_reset(); + } + /* For quality of the user experience, it's important to get * the video going ASAP. Because there are long delays in some * of the powerup steps, we do some very early setup here in diff --git a/src/mainboard/google/nyan_big/Makefile.inc b/src/mainboard/google/nyan_big/Makefile.inc index 30cd27d9fc..b66cd555fb 100644 --- a/src/mainboard/google/nyan_big/Makefile.inc +++ b/src/mainboard/google/nyan_big/Makefile.inc @@ -32,6 +32,7 @@ bootblock-y += bootblock.c bootblock-y += pmic.c bootblock-y += reset.c +romstage-y += reset.c romstage-y += romstage.c romstage-y += sdram_configs.c romstage-$(CONFIG_CHROMEOS) += chromeos.c diff --git a/src/mainboard/google/nyan_big/romstage.c b/src/mainboard/google/nyan_big/romstage.c index b4e27330ac..4e023654e7 100644 --- a/src/mainboard/google/nyan_big/romstage.c +++ b/src/mainboard/google/nyan_big/romstage.c @@ -27,12 +27,14 @@ #include <cbmem.h> #include <console/cbmem_console.h> #include <console/console.h> +#include <mainboard/google/nyan/reset.h> #include <romstage_handoff.h> #include <vendorcode/google/chromeos/chromeos.h> #include "sdram_configs.h" #include <soc/nvidia/tegra/i2c.h> #include <soc/nvidia/tegra124/chip.h> #include <soc/nvidia/tegra124/clk_rst.h> +#include <soc/nvidia/tegra124/power.h> #include <soc/nvidia/tegra124/sdram.h> #include <soc/addressmap.h> #include <soc/clock.h> @@ -181,6 +183,15 @@ static void __attribute__((noinline)) romstage(void) mmu_disable_range(0, 1); dcache_mmu_enable(); + /* + * A watchdog reset only resets part of the system so it ends up in + * a funny state. If that happens, we need to reset the whole machine. + */ + if (power_reset_status() == POWER_RESET_WATCHDOG) { + printk(BIOS_INFO, "Watchdog reset detected, rebooting.\n"); + cpu_reset(); + } + /* For quality of the user experience, it's important to get * the video going ASAP. Because there are long delays in some * of the powerup steps, we do some very early setup here in diff --git a/src/mainboard/google/nyan_blaze/Makefile.inc b/src/mainboard/google/nyan_blaze/Makefile.inc index 30cd27d9fc..b66cd555fb 100644 --- a/src/mainboard/google/nyan_blaze/Makefile.inc +++ b/src/mainboard/google/nyan_blaze/Makefile.inc @@ -32,6 +32,7 @@ bootblock-y += bootblock.c bootblock-y += pmic.c bootblock-y += reset.c +romstage-y += reset.c romstage-y += romstage.c romstage-y += sdram_configs.c romstage-$(CONFIG_CHROMEOS) += chromeos.c diff --git a/src/mainboard/google/nyan_blaze/romstage.c b/src/mainboard/google/nyan_blaze/romstage.c index b4e27330ac..4e023654e7 100644 --- a/src/mainboard/google/nyan_blaze/romstage.c +++ b/src/mainboard/google/nyan_blaze/romstage.c @@ -27,12 +27,14 @@ #include <cbmem.h> #include <console/cbmem_console.h> #include <console/console.h> +#include <mainboard/google/nyan/reset.h> #include <romstage_handoff.h> #include <vendorcode/google/chromeos/chromeos.h> #include "sdram_configs.h" #include <soc/nvidia/tegra/i2c.h> #include <soc/nvidia/tegra124/chip.h> #include <soc/nvidia/tegra124/clk_rst.h> +#include <soc/nvidia/tegra124/power.h> #include <soc/nvidia/tegra124/sdram.h> #include <soc/addressmap.h> #include <soc/clock.h> @@ -181,6 +183,15 @@ static void __attribute__((noinline)) romstage(void) mmu_disable_range(0, 1); dcache_mmu_enable(); + /* + * A watchdog reset only resets part of the system so it ends up in + * a funny state. If that happens, we need to reset the whole machine. + */ + if (power_reset_status() == POWER_RESET_WATCHDOG) { + printk(BIOS_INFO, "Watchdog reset detected, rebooting.\n"); + cpu_reset(); + } + /* For quality of the user experience, it's important to get * the video going ASAP. Because there are long delays in some * of the powerup steps, we do some very early setup here in |