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Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/reef/variants/baseboard/devicetree.cb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/reef/variants/baseboard/devicetree.cb b/src/mainboard/google/reef/variants/baseboard/devicetree.cb index fa097fd79b..49c1ba65d6 100644 --- a/src/mainboard/google/reef/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/reef/variants/baseboard/devicetree.cb @@ -53,6 +53,8 @@ chip soc/intel/apollolake # current VR solution. Experiments show that SoC TDP max (6W) can # be reached when RAPL PL1 is set to 12W. register "tdp_pl1_override_mw" = "12000" + # Set RAPL PL2 to 15W. + register "tdp_pl2_override_mw" = "15000" # Enable Audio Clock and Power gating register "hdaudio_clk_gate_enable" = "1" |