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-rw-r--r--src/mainboard/hp/snb_ivb_desktops/Kconfig8
-rw-r--r--src/mainboard/hp/snb_ivb_desktops/Kconfig.name3
-rw-r--r--src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/board_info.txt7
-rw-r--r--src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/data.vbtbin0 -> 3777 bytes
-rw-r--r--src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/early_init.c14
-rw-r--r--src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/gma-mainboard.ads17
-rw-r--r--src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/gpio.c191
-rw-r--r--src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/hda_verb.c32
-rw-r--r--src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/overridetree.cb32
9 files changed, 304 insertions, 0 deletions
diff --git a/src/mainboard/hp/snb_ivb_desktops/Kconfig b/src/mainboard/hp/snb_ivb_desktops/Kconfig
index a1abac3869..c23e85477f 100644
--- a/src/mainboard/hp/snb_ivb_desktops/Kconfig
+++ b/src/mainboard/hp/snb_ivb_desktops/Kconfig
@@ -27,6 +27,12 @@ config BOARD_HP_COMPAQ_8200_ELITE_USDT
select SOUTHBRIDGE_INTEL_BD82X6X
select BOARD_ROMSIZE_KB_8192
+config BOARD_HP_COMPAQ_8300_ELITE_SFF
+ select BOARD_HP_SNB_IVB_DESKTOPS_COMMON
+ select BOARD_ROMSIZE_KB_16384
+ select GFX_GMA_ANALOG_I2C_HDMI_B
+ select SOUTHBRIDGE_INTEL_BD82X6X
+
config BOARD_HP_COMPAQ_ELITE_8300_USDT
select BOARD_HP_SNB_IVB_DESKTOPS_COMMON
select SOUTHBRIDGE_INTEL_C216
@@ -64,6 +70,7 @@ config MAINBOARD_DIR
config VARIANT_DIR
default "compaq_8200_elite_sff" if BOARD_HP_COMPAQ_8200_ELITE_SFF_PC
default "compaq_8200_elite_usdt" if BOARD_HP_COMPAQ_8200_ELITE_USDT
+ default "compaq_8300_elite_sff" if BOARD_HP_COMPAQ_8300_ELITE_SFF
default "compaq_elite_8300_usdt" if BOARD_HP_COMPAQ_ELITE_8300_USDT
default "z220_cmt_workstation" if BOARD_HP_Z220_CMT_WORKSTATION
default "z220_sff_workstation" if BOARD_HP_Z220_SFF_WORKSTATION
@@ -71,6 +78,7 @@ config VARIANT_DIR
config MAINBOARD_PART_NUMBER
default "HP Compaq 8200 Elite SFF PC" if BOARD_HP_COMPAQ_8200_ELITE_SFF_PC
default "HP Compaq 8200 Elite USDT" if BOARD_HP_COMPAQ_8200_ELITE_USDT
+ default "HP Compaq 8300 Elite SFF" if BOARD_HP_COMPAQ_8300_ELITE_SFF
default "HP Compaq Elite 8300 USDT" if BOARD_HP_COMPAQ_ELITE_8300_USDT
default "HP Z220 CMT Workstation" if BOARD_HP_Z220_CMT_WORKSTATION
default "HP Z220 SFF Workstation" if BOARD_HP_Z220_SFF_WORKSTATION
diff --git a/src/mainboard/hp/snb_ivb_desktops/Kconfig.name b/src/mainboard/hp/snb_ivb_desktops/Kconfig.name
index 3402776077..2d3cf43620 100644
--- a/src/mainboard/hp/snb_ivb_desktops/Kconfig.name
+++ b/src/mainboard/hp/snb_ivb_desktops/Kconfig.name
@@ -6,6 +6,9 @@ config BOARD_HP_COMPAQ_8200_ELITE_SFF_PC
config BOARD_HP_COMPAQ_8200_ELITE_USDT
bool "Compaq 8200 Elite USDT"
+config BOARD_HP_COMPAQ_8300_ELITE_SFF
+ bool "Compaq 8300 Elite SFF"
+
config BOARD_HP_COMPAQ_ELITE_8300_USDT
bool "Compaq Elite 8300 USDT"
diff --git a/src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/board_info.txt b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/board_info.txt
new file mode 100644
index 0000000000..f050628652
--- /dev/null
+++ b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/board_info.txt
@@ -0,0 +1,7 @@
+Category: desktop
+Board URL: https://support.hp.com/us-en/product/hp-compaq-elite-8300-small-form-factor-pc/5232852
+ROM IC: MT25QL128
+ROM package: SOIC-16
+ROM socketed: no
+Flashrom support: yes
+Release year: 2012
diff --git a/src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/data.vbt b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/data.vbt
new file mode 100644
index 0000000000..c1fd6d1e13
--- /dev/null
+++ b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/data.vbt
Binary files differ
diff --git a/src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/early_init.c b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/early_init.c
new file mode 100644
index 0000000000..8d10c6317c
--- /dev/null
+++ b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/early_init.c
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <bootblock_common.h>
+#include <superio/nuvoton/npcd378/npcd378.h>
+#include <superio/nuvoton/common/nuvoton.h>
+#include <southbridge/intel/bd82x6x/pch.h>
+
+#define SERIAL_DEV PNP_DEV(0x2e, NPCD378_SP2)
+
+void bootblock_mainboard_early_init(void)
+{
+ if (CONFIG(CONSOLE_SERIAL))
+ nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+}
diff --git a/src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/gma-mainboard.ads b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/gma-mainboard.ads
new file mode 100644
index 0000000000..686f7d44db
--- /dev/null
+++ b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/gma-mainboard.ads
@@ -0,0 +1,17 @@
+-- SPDX-License-Identifier: GPL-2.0-or-later
+
+with HW.GFX.GMA;
+with HW.GFX.GMA.Display_Probing;
+
+use HW.GFX.GMA;
+use HW.GFX.GMA.Display_Probing;
+
+private package GMA.Mainboard is
+
+ ports : constant Port_List :=
+ (DP2,
+ HDMI2,
+ Analog,
+ others => Disabled);
+
+end GMA.Mainboard;
diff --git a/src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/gpio.c b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/gpio.c
new file mode 100644
index 0000000000..2ae852ae51
--- /dev/null
+++ b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/gpio.c
@@ -0,0 +1,191 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <southbridge/intel/common/gpio.h>
+
+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
+ .gpio0 = GPIO_MODE_GPIO,
+ .gpio1 = GPIO_MODE_GPIO,
+ .gpio2 = GPIO_MODE_NATIVE,
+ .gpio3 = GPIO_MODE_NATIVE,
+ .gpio4 = GPIO_MODE_NATIVE,
+ .gpio5 = GPIO_MODE_NATIVE,
+ .gpio6 = GPIO_MODE_GPIO,
+ .gpio7 = GPIO_MODE_GPIO,
+ .gpio8 = GPIO_MODE_GPIO,
+ .gpio9 = GPIO_MODE_NATIVE,
+ .gpio10 = GPIO_MODE_NATIVE,
+ .gpio11 = GPIO_MODE_GPIO,
+ .gpio12 = GPIO_MODE_NATIVE,
+ .gpio13 = GPIO_MODE_GPIO,
+ .gpio14 = GPIO_MODE_NATIVE,
+ .gpio15 = GPIO_MODE_GPIO,
+ .gpio16 = GPIO_MODE_GPIO,
+ .gpio17 = GPIO_MODE_GPIO,
+ .gpio18 = GPIO_MODE_NATIVE,
+ .gpio19 = GPIO_MODE_NATIVE,
+ .gpio20 = GPIO_MODE_NATIVE,
+ .gpio21 = GPIO_MODE_GPIO,
+ .gpio22 = GPIO_MODE_GPIO,
+ .gpio23 = GPIO_MODE_NATIVE,
+ .gpio24 = GPIO_MODE_GPIO,
+ .gpio25 = GPIO_MODE_NATIVE,
+ .gpio26 = GPIO_MODE_NATIVE,
+ .gpio27 = GPIO_MODE_GPIO,
+ .gpio28 = GPIO_MODE_GPIO,
+ .gpio29 = GPIO_MODE_GPIO,
+ .gpio30 = GPIO_MODE_NATIVE,
+ .gpio31 = GPIO_MODE_GPIO,
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
+ .gpio0 = GPIO_DIR_INPUT,
+ .gpio1 = GPIO_DIR_INPUT,
+ .gpio6 = GPIO_DIR_INPUT,
+ .gpio7 = GPIO_DIR_INPUT,
+ .gpio8 = GPIO_DIR_INPUT,
+ .gpio11 = GPIO_DIR_INPUT,
+ .gpio13 = GPIO_DIR_INPUT,
+ .gpio15 = GPIO_DIR_OUTPUT,
+ .gpio16 = GPIO_DIR_INPUT,
+ .gpio17 = GPIO_DIR_OUTPUT,
+ .gpio21 = GPIO_DIR_INPUT,
+ .gpio22 = GPIO_DIR_INPUT,
+ .gpio24 = GPIO_DIR_INPUT,
+ .gpio27 = GPIO_DIR_INPUT,
+ .gpio28 = GPIO_DIR_OUTPUT,
+ .gpio29 = GPIO_DIR_OUTPUT,
+ .gpio31 = GPIO_DIR_INPUT,
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_level = {
+ .gpio15 = GPIO_LEVEL_LOW,
+ .gpio17 = GPIO_LEVEL_LOW,
+ .gpio28 = GPIO_LEVEL_LOW,
+ .gpio29 = GPIO_LEVEL_HIGH,
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
+ .gpio0 = GPIO_INVERT,
+ .gpio1 = GPIO_INVERT,
+ .gpio6 = GPIO_INVERT,
+ .gpio11 = GPIO_INVERT,
+ .gpio13 = GPIO_INVERT,
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
+};
+
+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
+ .gpio32 = GPIO_MODE_GPIO,
+ .gpio33 = GPIO_MODE_GPIO,
+ .gpio34 = GPIO_MODE_GPIO,
+ .gpio35 = GPIO_MODE_GPIO,
+ .gpio36 = GPIO_MODE_GPIO,
+ .gpio37 = GPIO_MODE_GPIO,
+ .gpio38 = GPIO_MODE_GPIO,
+ .gpio39 = GPIO_MODE_GPIO,
+ .gpio40 = GPIO_MODE_NATIVE,
+ .gpio41 = GPIO_MODE_NATIVE,
+ .gpio42 = GPIO_MODE_NATIVE,
+ .gpio43 = GPIO_MODE_GPIO,
+ .gpio44 = GPIO_MODE_NATIVE,
+ .gpio45 = GPIO_MODE_NATIVE,
+ .gpio46 = GPIO_MODE_GPIO,
+ .gpio47 = GPIO_MODE_NATIVE,
+ .gpio48 = GPIO_MODE_GPIO,
+ .gpio49 = GPIO_MODE_GPIO,
+ .gpio50 = GPIO_MODE_NATIVE,
+ .gpio51 = GPIO_MODE_NATIVE,
+ .gpio52 = GPIO_MODE_NATIVE,
+ .gpio53 = GPIO_MODE_NATIVE,
+ .gpio54 = GPIO_MODE_GPIO,
+ .gpio55 = GPIO_MODE_NATIVE,
+ .gpio56 = GPIO_MODE_NATIVE,
+ .gpio57 = GPIO_MODE_GPIO,
+ .gpio58 = GPIO_MODE_NATIVE,
+ .gpio59 = GPIO_MODE_NATIVE,
+ .gpio60 = GPIO_MODE_NATIVE,
+ .gpio61 = GPIO_MODE_GPIO,
+ .gpio62 = GPIO_MODE_NATIVE,
+ .gpio63 = GPIO_MODE_NATIVE,
+};
+
+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
+ .gpio32 = GPIO_DIR_INPUT,
+ .gpio33 = GPIO_DIR_INPUT,
+ .gpio34 = GPIO_DIR_INPUT,
+ .gpio35 = GPIO_DIR_INPUT,
+ .gpio36 = GPIO_DIR_INPUT,
+ .gpio37 = GPIO_DIR_INPUT,
+ .gpio38 = GPIO_DIR_INPUT,
+ .gpio39 = GPIO_DIR_INPUT,
+ .gpio43 = GPIO_DIR_INPUT,
+ .gpio46 = GPIO_DIR_INPUT,
+ .gpio48 = GPIO_DIR_INPUT,
+ .gpio49 = GPIO_DIR_INPUT,
+ .gpio54 = GPIO_DIR_INPUT,
+ .gpio57 = GPIO_DIR_INPUT,
+ .gpio61 = GPIO_DIR_INPUT,
+};
+
+static const struct pch_gpio_set2 pch_gpio_set2_level = {
+};
+
+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
+};
+
+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
+ .gpio64 = GPIO_MODE_NATIVE,
+ .gpio65 = GPIO_MODE_NATIVE,
+ .gpio66 = GPIO_MODE_NATIVE,
+ .gpio67 = GPIO_MODE_NATIVE,
+ .gpio68 = GPIO_MODE_GPIO,
+ .gpio69 = GPIO_MODE_GPIO,
+ .gpio70 = GPIO_MODE_GPIO,
+ .gpio71 = GPIO_MODE_GPIO,
+ .gpio72 = GPIO_MODE_GPIO,
+ .gpio73 = GPIO_MODE_NATIVE,
+ .gpio74 = GPIO_MODE_NATIVE,
+ .gpio75 = GPIO_MODE_NATIVE,
+};
+
+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
+ .gpio68 = GPIO_DIR_INPUT,
+ .gpio69 = GPIO_DIR_INPUT,
+ .gpio70 = GPIO_DIR_INPUT,
+ .gpio71 = GPIO_DIR_OUTPUT,
+ .gpio72 = GPIO_DIR_INPUT,
+};
+
+static const struct pch_gpio_set3 pch_gpio_set3_level = {
+ .gpio71 = GPIO_LEVEL_LOW,
+};
+
+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
+};
+
+const struct pch_gpio_map mainboard_gpio_map = {
+ .set1 = {
+ .mode = &pch_gpio_set1_mode,
+ .direction = &pch_gpio_set1_direction,
+ .level = &pch_gpio_set1_level,
+ .blink = &pch_gpio_set1_blink,
+ .invert = &pch_gpio_set1_invert,
+ .reset = &pch_gpio_set1_reset,
+ },
+ .set2 = {
+ .mode = &pch_gpio_set2_mode,
+ .direction = &pch_gpio_set2_direction,
+ .level = &pch_gpio_set2_level,
+ .reset = &pch_gpio_set2_reset,
+ },
+ .set3 = {
+ .mode = &pch_gpio_set3_mode,
+ .direction = &pch_gpio_set3_direction,
+ .level = &pch_gpio_set3_level,
+ .reset = &pch_gpio_set3_reset,
+ },
+};
diff --git a/src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/hda_verb.c b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/hda_verb.c
new file mode 100644
index 0000000000..f563338c02
--- /dev/null
+++ b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/hda_verb.c
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/azalia_device.h>
+
+const u32 cim_verb_data[] = {
+ 0x10ec0221, /* Codec Vendor / Device ID: Realtek */
+ 0x103c3397, /* Subsystem ID */
+ 11, /* Number of 4 dword sets */
+ AZALIA_SUBVENDOR(0, 0x103c3397),
+ AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)),
+ AZALIA_PIN_CFG(0, 0x14, 0x01014020),
+ AZALIA_PIN_CFG(0, 0x17, 0x90170110),
+ AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
+ AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
+ AZALIA_PIN_CFG(0, 0x1a, 0x02a11c3f),
+ AZALIA_PIN_CFG(0, 0x1b, 0x01813c30),
+ AZALIA_PIN_CFG(0, 0x1d, 0x598301f0),
+ AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
+ AZALIA_PIN_CFG(0, 0x21, 0x0221102f),
+
+ 0x80862806, /* Codec Vendor / Device ID: Intel */
+ 0x80860101, /* Subsystem ID */
+ 4, /* Number of 4 dword sets */
+ AZALIA_SUBVENDOR(3, 0x80860101),
+ AZALIA_PIN_CFG(3, 0x05, 0x58560010),
+ AZALIA_PIN_CFG(3, 0x06, 0x18560020),
+ AZALIA_PIN_CFG(3, 0x07, 0x58560030),
+};
+
+const u32 pc_beep_verbs[0] = {};
+
+AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/overridetree.cb b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/overridetree.cb
new file mode 100644
index 0000000000..eb296f3dac
--- /dev/null
+++ b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_8300_elite_sff/overridetree.cb
@@ -0,0 +1,32 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+chip northbridge/intel/sandybridge
+ device domain 0 on
+ subsystemid 0x103c 0x3397 inherit
+
+ chip southbridge/intel/bd82x6x
+ register "sata_port_map" = "0xf"
+ register "superspeed_capable_ports" = "0x0000000f"
+ register "xhci_switchable_ports" = "0x0000000f"
+ register "xhci_overcurrent_mapping" = "0x0000000f"
+ register "usb_port_config" = "{
+ { 1, 0, 0 },
+ { 1, 0, 0 },
+ { 1, 0, 1 },
+ { 1, 0, 1 },
+ { 1, 0, 2 },
+ { 1, 0, 2 },
+ { 1, 0, 3 },
+ { 1, 0, 3 },
+ { 1, 1, 4 },
+ { 1, 0, 4 },
+ { 1, 0, 6 },
+ { 1, 0, 5 },
+ { 1, 0, 5 },
+ { 1, 0, 6 },
+ }"
+
+ device ref xhci on end
+ end
+ end
+end