7 files changed, 9 insertions, 9 deletions
diff --git a/src/mainboard/amd/parmer/buildOpts.c b/src/mainboard/amd/parmer/buildOpts.c
index 030634605d..319c811042 100644
--- a/src/mainboard/amd/parmer/buildOpts.c
+++ b/src/mainboard/amd/parmer/buildOpts.c
@@ -47,7 +47,7 @@
 #include "cpuLateInit.h"
 #include "GnbInterface.h"
 
-GPIO_CONTROL parmer_gpio[] = {
+CONST GPIO_CONTROL parmer_gpio[] = {
 	{183, Function1, GpioIn | GpioOutEnB | PullUpB},
 	{-1}
 };
diff --git a/src/mainboard/amd/thatcher/buildOpts.c b/src/mainboard/amd/thatcher/buildOpts.c
index 72390c0ae2..5f21d2e2f9 100644
--- a/src/mainboard/amd/thatcher/buildOpts.c
+++ b/src/mainboard/amd/thatcher/buildOpts.c
@@ -49,7 +49,7 @@
 
 #define FCH_NO_XHCI_SUPPORT			TRUE
 
-GPIO_CONTROL thatcher_gpio[] = {
+CONST GPIO_CONTROL thatcher_gpio[] = {
 	{183, Function1, PullUpB},
 	{-1}
 };
diff --git a/src/mainboard/asus/a88xm-e/buildOpts.c b/src/mainboard/asus/a88xm-e/buildOpts.c
index 25e7d3aed2..363e31f96d 100644
--- a/src/mainboard/asus/a88xm-e/buildOpts.c
+++ b/src/mainboard/asus/a88xm-e/buildOpts.c
@@ -54,7 +54,7 @@
 #define BLDCFG_FCH_GPP_PORT1_PRESENT		TRUE
 #define BLDCFG_FCH_GPP_PORT2_PRESENT		TRUE
 
-GPIO_CONTROL a88xm_e_gpio[] = {
+CONST GPIO_CONTROL a88xm_e_gpio[] = {
 	{-1}
 };
 #define BLDCFG_FCH_GPIO_CONTROL_LIST		(a88xm_e_gpio)
diff --git a/src/mainboard/asus/f2a85-m/buildOpts.c b/src/mainboard/asus/f2a85-m/buildOpts.c
index a69614fd47..b7e9c1b76a 100644
--- a/src/mainboard/asus/f2a85-m/buildOpts.c
+++ b/src/mainboard/asus/f2a85-m/buildOpts.c
@@ -53,7 +53,7 @@
 #define BLDCFG_FCH_GPP_PORT1_PRESENT		TRUE
 #define BLDCFG_FCH_GPP_PORT2_PRESENT		CONFIG(BOARD_ASUS_F2A85_M_PRO)
 
-GPIO_CONTROL f2a85_m_gpio[] = {
+CONST GPIO_CONTROL f2a85_m_gpio[] = {
 	{-1}
 };
 #define BLDCFG_FCH_GPIO_CONTROL_LIST		(f2a85_m_gpio)
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c b/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c
index a3553c0dc7..377e39016b 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c
+++ b/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c
@@ -71,7 +71,7 @@
 #define PULL_DOWN	(PullDown | PullUpB)
 #define PULL_NONE	(PullUpB)
 
-GPIO_CONTROL pavilion_m6_1035dx_gpio[] = {
+CONST GPIO_CONTROL pavilion_m6_1035dx_gpio[] = {
 	{57, Function1, OUTPUT_HIGH | PULL_NONE},	/* WLAN enable */
 	{-1}
 };
@@ -87,7 +87,7 @@ GPIO_CONTROL pavilion_m6_1035dx_gpio[] = {
 #define SCI_MAP_XHCI_10_0	0x78
 #define SCI_MAP_PWRBTN		0x73
 
-SCI_MAP_CONTROL m6_1035dx_sci_map[] = {
+CONST SCI_MAP_CONTROL m6_1035dx_sci_map[] = {
 	{GEVENT_PIN(EC_SCI_GEVENT), EC_SCI_GPE},
 	{GEVENT_PIN(EC_LID_GEVENT), EC_LID_GPE},
 	{GEVENT_PIN(PCIE_GEVENT), PCIE_GPE},
diff --git a/src/mainboard/lenovo/g505s/buildOpts.c b/src/mainboard/lenovo/g505s/buildOpts.c
index 19add3ac9b..3bf316e4fd 100644
--- a/src/mainboard/lenovo/g505s/buildOpts.c
+++ b/src/mainboard/lenovo/g505s/buildOpts.c
@@ -71,7 +71,7 @@
 #define PULL_DOWN	(PullDown | PullUpB)
 #define PULL_NONE	(PullUpB)
 
-GPIO_CONTROL lenovo_g505s_gpio[] = {
+CONST GPIO_CONTROL lenovo_g505s_gpio[] = {
 	{57, Function1, OUTPUT_HIGH | PULL_NONE},	/* WLAN enable */
 	{-1}
 };
@@ -87,7 +87,7 @@ GPIO_CONTROL lenovo_g505s_gpio[] = {
 #define SCI_MAP_XHCI_10_0	0x78
 #define SCI_MAP_PWRBTN		0x73
 
-SCI_MAP_CONTROL lenovo_g505s_sci_map[] = {
+CONST SCI_MAP_CONTROL lenovo_g505s_sci_map[] = {
 	{GEVENT_PIN(EC_SCI_GEVENT), EC_SCI_GPE},
 	{GEVENT_PIN(EC_LID_GEVENT), EC_LID_GPE},
 	{GEVENT_PIN(PCIE_GEVENT), PCIE_GPE},
diff --git a/src/mainboard/msi/ms7721/buildOpts.c b/src/mainboard/msi/ms7721/buildOpts.c
index 3a0ac1c3eb..dd5f8940d9 100644
--- a/src/mainboard/msi/ms7721/buildOpts.c
+++ b/src/mainboard/msi/ms7721/buildOpts.c
@@ -52,7 +52,7 @@
 #define BLDCFG_FCH_GPP_PORT0_PRESENT		TRUE
 #define BLDCFG_FCH_GPP_PORT1_PRESENT		TRUE
 
-GPIO_CONTROL ms7721_m_gpio[] = {
+CONST GPIO_CONTROL ms7721_m_gpio[] = {
 	{-1}
 };