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-rw-r--r--src/mainboard/google/guybrush/variants/baseboard/gpio.c21
-rw-r--r--src/mainboard/google/guybrush/variants/guybrush/gpio.c30
2 files changed, 32 insertions, 19 deletions
diff --git a/src/mainboard/google/guybrush/variants/baseboard/gpio.c b/src/mainboard/google/guybrush/variants/baseboard/gpio.c
index 8505f12037..352d0f58bf 100644
--- a/src/mainboard/google/guybrush/variants/baseboard/gpio.c
+++ b/src/mainboard/google/guybrush/variants/baseboard/gpio.c
@@ -58,7 +58,7 @@ static const struct soc_amd_gpio base_gpio_table[] = {
/* PCIE_RST0_L */
PAD_NFO(GPIO_26, PCIE_RST_L, HIGH),
/* PCIE_RST1_L */
- PAD_NF(GPIO_27, PCIE_RST1_L, PULL_NONE),
+ PAD_NFO(GPIO_27, PCIE_RST1_L, HIGH),
/* GPIO_28: Not available */
/* WLAN_AUX_RESET (Active HIGH)*/
PAD_GPO(GPIO_29, LOW),
@@ -78,7 +78,7 @@ static const struct soc_amd_gpio base_gpio_table[] = {
/* SOC_BIOS_WP_L */
PAD_GPI(GPIO_67, PULL_NONE),
/* EN_PP3300_TCHSCR */
- PAD_GPO(GPIO_68, LOW),
+ PAD_GPO(GPIO_68, HIGH),
/* SD_AUX_RESET_L */
PAD_GPO(GPIO_69, HIGH),
/* Unused TP27 */
@@ -167,6 +167,7 @@ static const struct soc_amd_gpio base_gpio_table[] = {
/* Early GPIO configuration */
static const struct soc_amd_gpio early_gpio_table[] = {
+ /* Assert all AUX reset lines */
/* WWAN_AUX_RESET_L */
PAD_GPO(GPIO_18, LOW),
/* WLAN_AUX_RESET (ACTIVE HIGH) */
@@ -177,8 +178,12 @@ static const struct soc_amd_gpio early_gpio_table[] = {
PAD_GPO(GPIO_69, LOW),
/* Guybrush BID>1: Unused TP27; BID==1: SD_AUX_RESET_L */
PAD_NC(GPIO_70),
+
+ /* Deassert PCIe Reset lines */
/* PCIE_RST0_L */
PAD_NFO(GPIO_26, PCIE_RST_L, HIGH),
+ /* PCIE_RST1_L */
+ PAD_NFO(GPIO_27, PCIE_RST1_L, HIGH),
/* Power on WLAN & WWAN */
/* EN_PP3300_WLAN */
@@ -239,7 +244,7 @@ static const struct soc_amd_gpio early_gpio_table[] = {
*/
static const struct soc_amd_gpio bootblock_gpio_table[] = {
-/* Enable WWAN & WLAN */
+ /* Enable WWAN & WLAN power, Deassert WWAN reset */
/* EN_PWR_WWAN_X */
PAD_GPO(GPIO_8, HIGH),
/* WWAN_RST_L */
@@ -257,7 +262,15 @@ static const struct soc_amd_gpio sleep_gpio_table[] = {
/* PCIE_RST needs to be brought high before FSP-M runs */
static const struct soc_amd_gpio pcie_gpio_table[] = {
-/* Disable all AUX_RESET lines & PCIE_RST */
+ /* Allow WWAN power to be overridden by platform */
+ /* EN_PWR_WWAN_X */
+ PAD_GPO(GPIO_8, HIGH),
+ /* WWAN_RST_L */
+ PAD_GPO(GPIO_24, HIGH),
+ /* WWAN_DISABLE */
+ PAD_GPO(GPIO_85, LOW),
+
+ /* Deassert all AUX_RESET lines & PCIE_RST */
/* WWAN_AUX_RESET_L */
PAD_GPO(GPIO_18, HIGH),
/* WLAN_AUX_RESET (ACTIVE HIGH) */
diff --git a/src/mainboard/google/guybrush/variants/guybrush/gpio.c b/src/mainboard/google/guybrush/variants/guybrush/gpio.c
index ff8403ba7c..b6c8eec8a0 100644
--- a/src/mainboard/google/guybrush/variants/guybrush/gpio.c
+++ b/src/mainboard/google/guybrush/variants/guybrush/gpio.c
@@ -23,21 +23,29 @@ static const struct soc_amd_gpio bid1_gpio_table[] = {
/* Use AUX Reset lines instead of PCIE_RST for Board Version 1 */
static const struct soc_amd_gpio bid1_early_gpio_table[] = {
/* SD_AUX_RESET_L */
- PAD_GPO(GPIO_70, HIGH),
+ PAD_GPO(GPIO_70, LOW),
};
/* This table is used by guybrush variant with board version < 2. */
static const struct soc_amd_gpio bid1_pcie_gpio_table[] = {
+ /* EN_PWR_WWAN_X */
+ PAD_GPO(GPIO_8, LOW),
+ /* WWAN_RST_L */
+ PAD_GPO(GPIO_24, LOW),
+ /* WWAN_DISABLE */
+ PAD_GPO(GPIO_85, HIGH),
/* SD_AUX_RESET_L */
PAD_GPO(GPIO_70, HIGH),
};
-/* WWAN on USB or no WWAN - Disable the WWAN power line */
-static const struct soc_amd_gpio bootblock_gpio_table_pcie_wwan[] = {
+/* This table is used by guybrush variant with board version >= 2. */
+static const struct soc_amd_gpio bid2_pcie_gpio_table[] = {
/* EN_PWR_WWAN_X */
PAD_GPO(GPIO_8, LOW),
- /* WLAN_DISABLE */
- PAD_GPO(GPIO_130, LOW),
+ /* WWAN_RST_L */
+ PAD_GPO(GPIO_24, LOW),
+ /* WWAN_DISABLE */
+ PAD_GPO(GPIO_85, HIGH),
};
const struct soc_amd_gpio *variant_override_gpio_table(size_t *size)
@@ -76,14 +84,6 @@ const struct soc_amd_gpio *variant_pcie_override_gpio_table(size_t *size)
return bid1_pcie_gpio_table;
}
- return NULL;
-}
-const struct soc_amd_gpio *variant_bootblock_override_gpio_table(size_t *size)
-{
- if (variant_has_pcie_wwan()) {
- *size = ARRAY_SIZE(bootblock_gpio_table_pcie_wwan);
- return bootblock_gpio_table_pcie_wwan;
- }
-
- return NULL;
+ *size = ARRAY_SIZE(bid2_pcie_gpio_table);
+ return bid2_pcie_gpio_table;
}