diff options
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/dedede/variants/baseboard/devicetree.cb | 3 | ||||
| -rw-r--r-- | src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb | 3 |
2 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb index 9064297c74..cb5321c773 100644 --- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb @@ -206,6 +206,9 @@ chip soc/intel/jasperlake # Enable HECI register "HeciEnabled" = "1" + # Set xHCI LFPS period sampling off time, the default is 9ms. + register "xhci_lfps_sampling_offtime_ms" = "9" + device domain 0 on device pci 00.0 on end # Host Bridge device pci 02.0 on end # Integrated Graphics Device diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb index abb5dc83a1..34f9eaeea1 100644 --- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb +++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb @@ -174,6 +174,9 @@ chip soc/intel/jasperlake # - PM_CFG.SLP_LAN_MIN_ASST_WDTH register "PchPmPwrCycDur" = "1" # 1s + # Set xHCI LFPS period sampling off time, the default is 9ms. + register "xhci_lfps_sampling_offtime_ms" = "9" + device domain 0 on device pci 00.0 on end # Host Bridge device pci 02.0 on end # Integrated Graphics Device |