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-rw-r--r--src/mainboard/amd/mahogany_fam10/spd_addr.h2
-rw-r--r--src/mainboard/amd/norwich/romstage.c2
-rw-r--r--src/mainboard/amd/tilapia_fam10/spd_addr.h2
-rw-r--r--src/mainboard/asus/m4a785-m/spd_addr.h2
-rw-r--r--src/mainboard/iei/kino-780am2-fam10/spd_addr.h2
-rw-r--r--src/mainboard/intel/xe7501devkit/acpi_tables.c8
-rw-r--r--src/mainboard/intel/xe7501devkit/mptable.c8
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/README4
-rw-r--r--src/mainboard/traverse/geos/romstage.c2
-rw-r--r--src/mainboard/via/epia-m700/acpi_tables.c4
-rw-r--r--src/mainboard/via/epia-n/acpi_tables.c6
11 files changed, 19 insertions, 23 deletions
diff --git a/src/mainboard/amd/mahogany_fam10/spd_addr.h b/src/mainboard/amd/mahogany_fam10/spd_addr.h
index c87a5995b8..489fa3330a 100644
--- a/src/mainboard/amd/mahogany_fam10/spd_addr.h
+++ b/src/mainboard/amd/mahogany_fam10/spd_addr.h
@@ -19,7 +19,7 @@
/**
* This file defines the SPD addresses for the mainboard. Must be included in
- * cache_as_ram_auto.c
+ * romstage.c
*/
#define RC00 0
diff --git a/src/mainboard/amd/norwich/romstage.c b/src/mainboard/amd/norwich/romstage.c
index 841c8a246e..e957d7ea94 100644
--- a/src/mainboard/amd/norwich/romstage.c
+++ b/src/mainboard/amd/norwich/romstage.c
@@ -77,7 +77,7 @@ void main(unsigned long bist)
/* cs5536_disable_internal_uart: disable them for now, set them
* up later...
*/
- /* If debug. real setup done in chipset init via Config.lb. */
+ /* If debug. real setup done in chipset init via devicetree.cb. */
cs5536_setup_onchipuart(1);
mb_gpio_init();
uart_init();
diff --git a/src/mainboard/amd/tilapia_fam10/spd_addr.h b/src/mainboard/amd/tilapia_fam10/spd_addr.h
index c87a5995b8..489fa3330a 100644
--- a/src/mainboard/amd/tilapia_fam10/spd_addr.h
+++ b/src/mainboard/amd/tilapia_fam10/spd_addr.h
@@ -19,7 +19,7 @@
/**
* This file defines the SPD addresses for the mainboard. Must be included in
- * cache_as_ram_auto.c
+ * romstage.c
*/
#define RC00 0
diff --git a/src/mainboard/asus/m4a785-m/spd_addr.h b/src/mainboard/asus/m4a785-m/spd_addr.h
index c87a5995b8..489fa3330a 100644
--- a/src/mainboard/asus/m4a785-m/spd_addr.h
+++ b/src/mainboard/asus/m4a785-m/spd_addr.h
@@ -19,7 +19,7 @@
/**
* This file defines the SPD addresses for the mainboard. Must be included in
- * cache_as_ram_auto.c
+ * romstage.c
*/
#define RC00 0
diff --git a/src/mainboard/iei/kino-780am2-fam10/spd_addr.h b/src/mainboard/iei/kino-780am2-fam10/spd_addr.h
index c87a5995b8..489fa3330a 100644
--- a/src/mainboard/iei/kino-780am2-fam10/spd_addr.h
+++ b/src/mainboard/iei/kino-780am2-fam10/spd_addr.h
@@ -19,7 +19,7 @@
/**
* This file defines the SPD addresses for the mainboard. Must be included in
- * cache_as_ram_auto.c
+ * romstage.c
*/
#define RC00 0
diff --git a/src/mainboard/intel/xe7501devkit/acpi_tables.c b/src/mainboard/intel/xe7501devkit/acpi_tables.c
index 3695bb4dc4..9324144026 100644
--- a/src/mainboard/intel/xe7501devkit/acpi_tables.c
+++ b/src/mainboard/intel/xe7501devkit/acpi_tables.c
@@ -55,7 +55,7 @@ unsigned long acpi_fill_madt(unsigned long current)
// P64H2#2 Bus A IOAPIC
dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(30, 0));
if (!dev)
- BUG(); // Config.lb error?
+ BUG();
res = find_resource(dev, PCI_BASE_ADDRESS_0);
current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, IOAPIC_P64H2_2_BUS_A, res->base, irq_start);
irq_start += INTEL_IOAPIC_NUM_INTERRUPTS;
@@ -63,7 +63,7 @@ unsigned long acpi_fill_madt(unsigned long current)
// P64H2#2 Bus B IOAPIC
dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(28, 0));
if (!dev)
- BUG(); // Config.lb error?
+ BUG();
res = find_resource(dev, PCI_BASE_ADDRESS_0);
current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, IOAPIC_P64H2_2_BUS_B, res->base, irq_start);
irq_start += INTEL_IOAPIC_NUM_INTERRUPTS;
@@ -72,7 +72,7 @@ unsigned long acpi_fill_madt(unsigned long current)
// P64H2#1 Bus A IOAPIC
dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(30, 0));
if (!dev)
- BUG(); // Config.lb error?
+ BUG();
res = find_resource(dev, PCI_BASE_ADDRESS_0);
current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, IOAPIC_P64H2_1_BUS_A, res->base, irq_start);
irq_start += INTEL_IOAPIC_NUM_INTERRUPTS;
@@ -80,7 +80,7 @@ unsigned long acpi_fill_madt(unsigned long current)
// P64H2#1 Bus B IOAPIC
dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(28, 0));
if (!dev)
- BUG(); // Config.lb error?
+ BUG();
res = find_resource(dev, PCI_BASE_ADDRESS_0);
current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, IOAPIC_P64H2_1_BUS_B, res->base, irq_start);
irq_start += INTEL_IOAPIC_NUM_INTERRUPTS;
diff --git a/src/mainboard/intel/xe7501devkit/mptable.c b/src/mainboard/intel/xe7501devkit/mptable.c
index 9279b8485d..1a9268061d 100644
--- a/src/mainboard/intel/xe7501devkit/mptable.c
+++ b/src/mainboard/intel/xe7501devkit/mptable.c
@@ -42,14 +42,14 @@ static void xe7501devkit_register_ioapics(struct mp_config_table *mc)
// P64H2#2 Bus A IOAPIC
dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(30, 0));
if (!dev)
- BUG(); // Config.lb error?
+ BUG();
res = find_resource(dev, PCI_BASE_ADDRESS_0);
smp_write_ioapic(mc, IOAPIC_P64H2_2_BUS_A, P64H2_IOAPIC_VERSION, res->base);
// P64H2#2 Bus B IOAPIC
dev = dev_find_slot(PCI_BUS_E7501_HI_B, PCI_DEVFN(28, 0));
if (!dev)
- BUG(); // Config.lb error?
+ BUG();
res = find_resource(dev, PCI_BASE_ADDRESS_0);
smp_write_ioapic(mc, IOAPIC_P64H2_2_BUS_B, P64H2_IOAPIC_VERSION, res->base);
@@ -57,14 +57,14 @@ static void xe7501devkit_register_ioapics(struct mp_config_table *mc)
// P64H2#1 Bus A IOAPIC
dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(30, 0));
if (!dev)
- BUG(); // Config.lb error?
+ BUG();
res = find_resource(dev, PCI_BASE_ADDRESS_0);
smp_write_ioapic(mc, IOAPIC_P64H2_1_BUS_A, P64H2_IOAPIC_VERSION, res->base);
// P64H2#1 Bus B IOAPIC
dev = dev_find_slot(PCI_BUS_E7501_HI_D, PCI_DEVFN(28, 0));
if (!dev)
- BUG(); // Config.lb error?
+ BUG();
res = find_resource(dev, PCI_BASE_ADDRESS_0);
smp_write_ioapic(mc, IOAPIC_P64H2_1_BUS_B, P64H2_IOAPIC_VERSION, res->base);
}
diff --git a/src/mainboard/supermicro/h8dmr_fam10/README b/src/mainboard/supermicro/h8dmr_fam10/README
index ce030987ca..040c24498c 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/README
+++ b/src/mainboard/supermicro/h8dmr_fam10/README
@@ -2,10 +2,6 @@
There are a number of outstanding issues:
-* we don't have the mc_patch_01000086.h CPU ucode file yet which is
-referenced in a comment in src/mainboard/supermicro/h8dmr_fam10/Options.lb.
-AMD has not released it yet. This is not a problem specific to this port.
-
* I'm seeing toolchain issues. I can't get this tree to compile correctly with
gcc 4.3 (32 bit) - there is an optimization issue where certain parts of the
CBFS code execute very slowly. With gcc 3.4 (32 bit) that slowness
diff --git a/src/mainboard/traverse/geos/romstage.c b/src/mainboard/traverse/geos/romstage.c
index d383270285..d5a00a4cbe 100644
--- a/src/mainboard/traverse/geos/romstage.c
+++ b/src/mainboard/traverse/geos/romstage.c
@@ -78,7 +78,7 @@ void main(unsigned long bist)
/* cs5536_disable_internal_uart: disable them for now, set them
* up later...
*/
- /* If debug. real setup done in chipset init via Config.lb. */
+ /* If debug. real setup done in chipset init via devicetree.cb. */
cs5536_setup_onchipuart(1);
mb_gpio_init();
uart_init();
diff --git a/src/mainboard/via/epia-m700/acpi_tables.c b/src/mainboard/via/epia-m700/acpi_tables.c
index 414466f4f6..16c0b46b43 100644
--- a/src/mainboard/via/epia-m700/acpi_tables.c
+++ b/src/mainboard/via/epia-m700/acpi_tables.c
@@ -42,9 +42,9 @@ extern u32 wake_vec;
/*
* These four macros are copied from <arch/smp/mpspec.h>, I have to do this
- * since the "default CONFIG_GENERATE_MP_TABLE = 0" in Options.lb, and also since
+ * since the "CONFIG_GENERATE_MP_TABLE = 0", and also since
* mainboard/via/... have no mptable.c (so that I can not set
- * CONFIG_GENERATE_MP_TABLE = 1) as many other mainboards.
+ * "CONFIG_GENERATE_MP_TABLE = 1" as many other mainboards.
* So I have to copy these four to here. acpi_fill_madt() needs this.
*/
#define MP_IRQ_POLARITY_HIGH 0x1
diff --git a/src/mainboard/via/epia-n/acpi_tables.c b/src/mainboard/via/epia-n/acpi_tables.c
index 741784e839..589e14c606 100644
--- a/src/mainboard/via/epia-n/acpi_tables.c
+++ b/src/mainboard/via/epia-n/acpi_tables.c
@@ -39,10 +39,10 @@
extern const unsigned char AmlCode[];
/*
- * These four macros are copied from <arch/smp/mpspec.h>, I have to do this
- * since the "default CONFIG_GENERATE_MP_TABLE = 0" in Options.lb, and also since
+ * These 8 macros are copied from <arch/smp/mpspec.h>, I have to do this
+ * since the "CONFIG_GENERATE_MP_TABLE = 0", and also since
* mainboard/via/... have no mptable.c (so that I can not set
- * CONFIG_GENERATE_MP_TABLE = 1) as many other mainboards.
+ * "CONFIG_GENERATE_MP_TABLE = 1" as many other mainboards.
* So I have to copy these four to here. acpi_fill_madt() needs this.
*/
#define MP_IRQ_POLARITY_DEFAULT 0x0
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-18 04:44:28 +0000