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-rw-r--r--src/mainboard/google/brya/variants/trulo/overridetree.cb224
1 files changed, 224 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/trulo/overridetree.cb b/src/mainboard/google/brya/variants/trulo/overridetree.cb
index 27156dbb27..d5cb4f624c 100644
--- a/src/mainboard/google/brya/variants/trulo/overridetree.cb
+++ b/src/mainboard/google/brya/variants/trulo/overridetree.cb
@@ -1,4 +1,8 @@
fw_config
+ field THERMAL_SOLUTION 0 0
+ option THERMAL_SOLUTION_6W 0
+ option THERMAL_SOLUTION_15W 1
+ end
field STORAGE 30 31
option STORAGE_EMMC 0
option STORAGE_NVME 1
@@ -6,6 +10,7 @@ fw_config
option STORAGE_UNKNOWN 3
end
end
+
chip soc/intel/alderlake
register "sagv" = "SaGv_Enabled"
@@ -16,6 +21,11 @@ chip soc/intel/alderlake
# S0ix enable
register "s0ix_enable" = "1"
+ # DPTF enable
+ register "dptf_enable" = "1"
+
+ register "tcc_offset" = "10" # TCC of 90
+
# Enable CNVi BT
register "cnvi_bt_core" = "true"
@@ -154,8 +164,222 @@ chip soc/intel/alderlake
},
}"
+ register "power_limits_config[ADL_N_041_6W_CORE]" = "{
+ .tdp_pl1_override = 20,
+ .tdp_pl2_override = 25,
+ .tdp_pl4 = 78,
+ }"
+
+ register "power_limits_config[ADL_N_081_7W_CORE]" = "{
+ .tdp_pl1_override = 20,
+ .tdp_pl2_override = 25,
+ .tdp_pl4 = 78,
+ }"
+
+ register "power_limits_config[ADL_N_081_15W_CORE]" = "{
+ .tdp_pl1_override = 20,
+ .tdp_pl2_override = 35,
+ .tdp_pl4 = 83,
+ }"
+
device domain 0 on
device ref igpu on end
+ device ref dtt on
+ chip drivers/intel/dptf
+ ## sensor information
+ register "options.tsr[0].desc" = ""DDR""
+ register "options.tsr[1].desc" = ""charger""
+ register "options.tsr[2].desc" = ""ambient""
+
+ ## Active Policy
+ register "policies.active" = "{
+ [0] = {
+ .target = DPTF_CPU,
+ .thresholds = {
+ TEMP_PCT(70, 100),
+ TEMP_PCT(60, 65),
+ TEMP_PCT(42, 60),
+ TEMP_PCT(39, 55),
+ TEMP_PCT(38, 50),
+ TEMP_PCT(35, 43),
+ TEMP_PCT(31, 30),
+ }
+ },
+ [1] = {
+ .target = DPTF_TEMP_SENSOR_0,
+ .thresholds = {
+ TEMP_PCT(60, 100),
+ TEMP_PCT(55, 65),
+ TEMP_PCT(52, 60),
+ TEMP_PCT(50, 55),
+ TEMP_PCT(48, 50),
+ TEMP_PCT(45, 43),
+ TEMP_PCT(41, 30),
+ }
+ }
+ }"
+
+ ## Passive Policy
+ register "policies.passive" = "{
+ [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
+ [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 70, 5000),
+ [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 70, 5000),
+ [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 70, 5000),
+ }"
+
+ ## Critical Policy
+ register "policies.critical" = "{
+ [0] = DPTF_CRITICAL(CPU, 100, SHUTDOWN),
+ [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 95, SHUTDOWN),
+ [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 95, SHUTDOWN),
+ [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 95, SHUTDOWN),
+ }"
+
+ register "controls.power_limits" = "{
+ .pl1 = {
+ .min_power = 6000,
+ .max_power = 20000,
+ .time_window_min = 28 * MSECS_PER_SEC,
+ .time_window_max = 28 * MSECS_PER_SEC,
+ .granularity = 500
+ },
+ .pl2 = {
+ .min_power = 25000,
+ .max_power = 25000,
+ .time_window_min = 32 * MSECS_PER_SEC,
+ .time_window_max = 32 * MSECS_PER_SEC,
+ .granularity = 500
+ }
+ }"
+
+ ## Charger Performance Control (Control, mA)
+ register "controls.charger_perf" = "{
+ [0] = { 255, 1700 },
+ [1] = { 24, 1500 },
+ [2] = { 16, 1000 },
+ [3] = { 8, 500 }
+ }"
+
+ ## Fan Performance Control (Percent, Speed, Noise, Power)
+ register "controls.fan_perf" = "{
+ [0] = { 100, 6000, 220, 2200, },
+ [1] = { 92, 5500, 180, 1800, },
+ [2] = { 85, 5000, 145, 1450, },
+ [3] = { 70, 4400, 115, 1150, },
+ [4] = { 56, 3900, 90, 900, },
+ [5] = { 45, 3300, 55, 550, },
+ [6] = { 38, 3000, 30, 300, },
+ [7] = { 33, 2900, 15, 150, },
+ [8] = { 10, 800, 10, 100, },
+ [9] = { 0, 0, 0, 50, }
+ }"
+
+ ## Fan options
+ register "options.fan.fine_grained_control" = "1"
+ register "options.fan.step_size" = "2"
+
+ device generic 0 on
+ probe THERMAL_SOLUTION THERMAL_SOLUTION_6W
+ end
+ end
+ chip drivers/intel/dptf
+ ## sensor information
+ register "options.tsr[0].desc" = ""DDR""
+ register "options.tsr[1].desc" = ""charger""
+ register "options.tsr[2].desc" = ""ambient""
+
+ ## Active Policy
+ register "policies.active" = "{
+ [0] = {
+ .target = DPTF_CPU,
+ .thresholds = {
+ TEMP_PCT(70, 100),
+ TEMP_PCT(60, 65),
+ TEMP_PCT(42, 58),
+ TEMP_PCT(39, 53),
+ TEMP_PCT(38, 47),
+ TEMP_PCT(35, 43),
+ TEMP_PCT(31, 30),
+ }
+ },
+ [1] = {
+ .target = DPTF_TEMP_SENSOR_0,
+ .thresholds = {
+ TEMP_PCT(60, 100),
+ TEMP_PCT(55, 65),
+ TEMP_PCT(52, 58),
+ TEMP_PCT(50, 53),
+ TEMP_PCT(48, 47),
+ TEMP_PCT(45, 43),
+ TEMP_PCT(41, 30),
+ }
+ }
+ }"
+
+ ## Passive Policy
+ register "policies.passive" = "{
+ [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
+ [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 70, 5000),
+ [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 70, 5000),
+ [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 70, 5000),
+ }"
+
+ ## Critical Policy
+ register "policies.critical" = "{
+ [0] = DPTF_CRITICAL(CPU, 100, SHUTDOWN),
+ [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 95, SHUTDOWN),
+ [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 95, SHUTDOWN),
+ [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 95, SHUTDOWN),
+ }"
+
+ register "controls.power_limits" = "{
+ .pl1 = {
+ .min_power = 15000,
+ .max_power = 20000,
+ .time_window_min = 28 * MSECS_PER_SEC,
+ .time_window_max = 28 * MSECS_PER_SEC,
+ .granularity = 500
+ },
+ .pl2 = {
+ .min_power = 35000,
+ .max_power = 35000,
+ .time_window_min = 32 * MSECS_PER_SEC,
+ .time_window_max = 32 * MSECS_PER_SEC,
+ .granularity = 500
+ }
+ }"
+
+ ## Charger Performance Control (Control, mA)
+ register "controls.charger_perf" = "{
+ [0] = { 255, 1700 },
+ [1] = { 24, 1500 },
+ [2] = { 16, 1000 },
+ [3] = { 8, 500 }
+ }"
+
+ ## Fan Performance Control (Percent, Speed, Noise, Power)
+ register "controls.fan_perf" = "{
+ [0] = { 100, 6000, 220, 2200, },
+ [1] = { 92, 5500, 180, 1800, },
+ [2] = { 85, 5000, 145, 1450, },
+ [3] = { 70, 4400, 115, 1150, },
+ [4] = { 56, 3900, 90, 900, },
+ [5] = { 45, 3300, 55, 550, },
+ [6] = { 38, 3000, 30, 300, },
+ [7] = { 33, 2900, 15, 150, },
+ [8] = { 10, 800, 10, 100, },
+ [9] = { 0, 0, 0, 50, }
+ }"
+
+ ## Fan options
+ register "options.fan.fine_grained_control" = "1"
+ register "options.fan.step_size" = "2"
+
+ device generic 1 on
+ probe THERMAL_SOLUTION THERMAL_SOLUTION_15W
+ end
+ end
+ end
device ref tcss_xhci on
chip drivers/usb/acpi
device ref tcss_root_hub on
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-15 09:50:13 +0000