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-rw-r--r--src/mainboard/intel/adlrvp/gpio.c1
-rw-r--r--src/mainboard/intel/coffeelake_rvp/variants/cfl_h/hda_verb.c1
-rw-r--r--src/mainboard/intel/coffeelake_rvp/variants/cfl_s/hda_verb.c1
-rw-r--r--src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/memory.c1
-rw-r--r--src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c1
-rw-r--r--src/mainboard/intel/jasperlake_rvp/variants/jslrvp/memory.c2
-rw-r--r--src/mainboard/intel/kblrvp/ramstage.c1
-rw-r--r--src/mainboard/intel/kblrvp/variants/rvp11/include/variant/hda_verb.h1
-rw-r--r--src/mainboard/intel/kblrvp/variants/rvp3/include/variant/hda_verb.h1
-rw-r--r--src/mainboard/intel/kblrvp/variants/rvp7/include/variant/hda_verb.h1
-rw-r--r--src/mainboard/intel/kunimitsu/spd/spd_util.c1
-rw-r--r--src/mainboard/intel/mtlrvp/fw_config.c1
-rw-r--r--src/mainboard/intel/shadowmountain/variants/baseboard/early_gpio.c1
-rw-r--r--src/mainboard/intel/strago/gpio.c1
-rw-r--r--src/mainboard/intel/tglrvp/romstage_fsp_params.c1
-rw-r--r--src/mainboard/protectli/vault_bsw/gpio.c1
-rw-r--r--src/mainboard/protectli/vault_cml/gpio.c1
-rw-r--r--src/mainboard/protectli/vault_ehl/gpio.h1
-rw-r--r--src/mainboard/siemens/fa_ehl/variants/fa_ehl/gpio.c1
-rw-r--r--src/mainboard/siemens/fa_ehl/variants/fa_ehl/memory.c1
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl1/gpio.c1
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c1
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl3/gpio.c1
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl5/gpio.c1
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl6/gpio.c1
-rw-r--r--src/mainboard/siemens/mc_ehl/variants/mc_ehl1/memory.c1
-rw-r--r--src/mainboard/siemens/mc_ehl/variants/mc_ehl2/gpio.c1
-rw-r--r--src/mainboard/siemens/mc_ehl/variants/mc_ehl2/memory.c1
-rw-r--r--src/mainboard/siemens/mc_ehl/variants/mc_ehl3/gpio.c1
-rw-r--r--src/mainboard/siemens/mc_ehl/variants/mc_ehl3/memory.c1
-rw-r--r--src/mainboard/siemens/mc_ehl/variants/mc_ehl4/memory.c1
-rw-r--r--src/mainboard/siemens/mc_ehl/variants/mc_ehl5/gpio.c1
-rw-r--r--src/mainboard/siemens/mc_ehl/variants/mc_ehl5/memory.c1
33 files changed, 0 insertions, 34 deletions
diff --git a/src/mainboard/intel/adlrvp/gpio.c b/src/mainboard/intel/adlrvp/gpio.c
index 3c43a742e7..d1ed7c7df1 100644
--- a/src/mainboard/intel/adlrvp/gpio.c
+++ b/src/mainboard/intel/adlrvp/gpio.c
@@ -7,7 +7,6 @@
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
-
/* GPIO A0-A6, A9-A10 default function is NF1 for eSPI interface when
eSPI is enabled */
diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/hda_verb.c b/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/hda_verb.c
index cbe8f0be21..9c1759de90 100644
--- a/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/hda_verb.c
+++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/hda_verb.c
@@ -3,7 +3,6 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
-
/*
* VerbTable: CFL Display Audio Codec
* Revision ID = 0xFF
diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/hda_verb.c b/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/hda_verb.c
index cbe8f0be21..9c1759de90 100644
--- a/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/hda_verb.c
+++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/hda_verb.c
@@ -3,7 +3,6 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
-
/*
* VerbTable: CFL Display Audio Codec
* Revision ID = 0xFF
diff --git a/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/memory.c b/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/memory.c
index 8a2b8f9217..6b9b7ec85c 100644
--- a/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/memory.c
+++ b/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/memory.c
@@ -6,7 +6,6 @@
#include <soc/romstage.h>
static const struct mb_cfg ehlcrb_lpddr4x_memcfg_cfg = {
-
.dq_map[DDR_CH0] = {
{0xf, 0xf0},
{0xf, 0xf0},
diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c
index eab0fe5671..6a3ce3e64f 100644
--- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c
+++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c
@@ -7,7 +7,6 @@
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
-
/* WWAN_WAKE_N */
PAD_CFG_GPI_SCI(GPP_A10, NONE, DEEP, LEVEL, INVERT),
diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/memory.c b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/memory.c
index bea9cd80d4..618e74eaed 100644
--- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/memory.c
+++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/memory.c
@@ -8,7 +8,6 @@
#include <soc/romstage.h>
static const struct mb_cfg jslrvp_ddr4_memcfg_cfg = {
-
.dq_map[DDR_CH0] = {
{0xf, 0xf0},
{0xf, 0xf0},
@@ -51,7 +50,6 @@ static const struct mb_cfg jslrvp_ddr4_memcfg_cfg = {
};
static const struct mb_cfg jslrvp_lpddr4_memcfg_cfg = {
-
.dq_map[DDR_CH0] = {
{0xf, 0xf0},
{0xf, 0xf0},
diff --git a/src/mainboard/intel/kblrvp/ramstage.c b/src/mainboard/intel/kblrvp/ramstage.c
index feccc08706..c182bd77e5 100644
--- a/src/mainboard/intel/kblrvp/ramstage.c
+++ b/src/mainboard/intel/kblrvp/ramstage.c
@@ -48,7 +48,6 @@ static void ioexpander_init(void *unused)
/* Port 0 Configuration */
i2c_writeb(IO_EXPANDER_BUS, IO_EXPANDER_1_ADDR, IO_EXPANDER_P0CONF,
0x00);
-
}
BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, ioexpander_init, NULL);
diff --git a/src/mainboard/intel/kblrvp/variants/rvp11/include/variant/hda_verb.h b/src/mainboard/intel/kblrvp/variants/rvp11/include/variant/hda_verb.h
index 1ec4488634..10c8a8f977 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp11/include/variant/hda_verb.h
+++ b/src/mainboard/intel/kblrvp/variants/rvp11/include/variant/hda_verb.h
@@ -6,7 +6,6 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
-
0x8086280B,
0x00000000,
0x00000005,
diff --git a/src/mainboard/intel/kblrvp/variants/rvp3/include/variant/hda_verb.h b/src/mainboard/intel/kblrvp/variants/rvp3/include/variant/hda_verb.h
index 8f2188c5b9..6915638ed6 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp3/include/variant/hda_verb.h
+++ b/src/mainboard/intel/kblrvp/variants/rvp3/include/variant/hda_verb.h
@@ -6,7 +6,6 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
-
0x8086280B,
0x00000000,
0x00000005,
diff --git a/src/mainboard/intel/kblrvp/variants/rvp7/include/variant/hda_verb.h b/src/mainboard/intel/kblrvp/variants/rvp7/include/variant/hda_verb.h
index c86ecaf612..493b1872e4 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp7/include/variant/hda_verb.h
+++ b/src/mainboard/intel/kblrvp/variants/rvp7/include/variant/hda_verb.h
@@ -6,7 +6,6 @@
#include <device/azalia_device.h>
const u32 cim_verb_data[] = {
-
0x8086280B,
0x00000000,
0x00000005,
diff --git a/src/mainboard/intel/kunimitsu/spd/spd_util.c b/src/mainboard/intel/kunimitsu/spd/spd_util.c
index 8674512ff4..8c1407adc6 100644
--- a/src/mainboard/intel/kunimitsu/spd/spd_util.c
+++ b/src/mainboard/intel/kunimitsu/spd/spd_util.c
@@ -55,7 +55,6 @@ void mainboard_fill_rcomp_strength_data(void *rcomp_strength_ptr)
} else {
memcpy(rcomp_strength_ptr, RcompTarget, sizeof(RcompTarget));
}
-
}
uintptr_t mainboard_get_spd_data(void)
diff --git a/src/mainboard/intel/mtlrvp/fw_config.c b/src/mainboard/intel/mtlrvp/fw_config.c
index d874228bde..eac854c81f 100644
--- a/src/mainboard/intel/mtlrvp/fw_config.c
+++ b/src/mainboard/intel/mtlrvp/fw_config.c
@@ -96,6 +96,5 @@ static void fw_config_handle(void *unused)
printk(BIOS_INFO, "Configure GPIOs for SoundWire audio (onboard codec).\n");
gpio_configure_pads(sndw_alc711_enable_pads, ARRAY_SIZE(i2s_enable_pads));
}
-
}
BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL);
diff --git a/src/mainboard/intel/shadowmountain/variants/baseboard/early_gpio.c b/src/mainboard/intel/shadowmountain/variants/baseboard/early_gpio.c
index ea05b89275..459fdd18cb 100644
--- a/src/mainboard/intel/shadowmountain/variants/baseboard/early_gpio.c
+++ b/src/mainboard/intel/shadowmountain/variants/baseboard/early_gpio.c
@@ -5,7 +5,6 @@
/* Early pad configuration in bootblock */
static const struct pad_config early_gpio_table[] = {
-
/* UART0 RX */
PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2),
/* UART0 TX */
diff --git a/src/mainboard/intel/strago/gpio.c b/src/mainboard/intel/strago/gpio.c
index 0e7f88c2ef..81db91e2c9 100644
--- a/src/mainboard/intel/strago/gpio.c
+++ b/src/mainboard/intel/strago/gpio.c
@@ -241,6 +241,5 @@ static struct soc_gpio_config gpio_config = {
struct soc_gpio_config *mainboard_get_gpios(void)
{
-
return &gpio_config;
}
diff --git a/src/mainboard/intel/tglrvp/romstage_fsp_params.c b/src/mainboard/intel/tglrvp/romstage_fsp_params.c
index 22859f62e6..3070569d73 100644
--- a/src/mainboard/intel/tglrvp/romstage_fsp_params.c
+++ b/src/mainboard/intel/tglrvp/romstage_fsp_params.c
@@ -48,5 +48,4 @@ void mainboard_memory_init_params(FSPM_UPD *mupd)
bool half_populated = false;
memcfg_init(mupd, mem_config, &spd_info, half_populated);
-
}
diff --git a/src/mainboard/protectli/vault_bsw/gpio.c b/src/mainboard/protectli/vault_bsw/gpio.c
index b748799819..59e4421754 100644
--- a/src/mainboard/protectli/vault_bsw/gpio.c
+++ b/src/mainboard/protectli/vault_bsw/gpio.c
@@ -232,6 +232,5 @@ static struct soc_gpio_config gpio_config = {
struct soc_gpio_config *mainboard_get_gpios(void)
{
-
return &gpio_config;
}
diff --git a/src/mainboard/protectli/vault_cml/gpio.c b/src/mainboard/protectli/vault_cml/gpio.c
index 72faae97c0..940d3bd70c 100644
--- a/src/mainboard/protectli/vault_cml/gpio.c
+++ b/src/mainboard/protectli/vault_cml/gpio.c
@@ -7,7 +7,6 @@
/* Pad configuration was generated automatically using intelp2m utility */
static const struct pad_config gpio_table[] = {
-
/* ------- GPIO Community 0 ------- */
/* ------- GPIO Group GPP_A ------- */
diff --git a/src/mainboard/protectli/vault_ehl/gpio.h b/src/mainboard/protectli/vault_ehl/gpio.h
index 8aa1224ff9..2f1c2ec040 100644
--- a/src/mainboard/protectli/vault_ehl/gpio.h
+++ b/src/mainboard/protectli/vault_ehl/gpio.h
@@ -15,7 +15,6 @@
/* PAD configuration was generated automatically using intelp2m utility */
static const struct pad_config gpio_table[] = {
-
/* ------- GPIO Community 0 ------- */
/* ------- GPIO Group GPP_B ------- */
diff --git a/src/mainboard/siemens/fa_ehl/variants/fa_ehl/gpio.c b/src/mainboard/siemens/fa_ehl/variants/fa_ehl/gpio.c
index 20a89c64d1..e54f2aa2fc 100644
--- a/src/mainboard/siemens/fa_ehl/variants/fa_ehl/gpio.c
+++ b/src/mainboard/siemens/fa_ehl/variants/fa_ehl/gpio.c
@@ -5,7 +5,6 @@
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
-
/* Community 0 - GpioGroup GPP_B */
PAD_CFG_NF(GPP_B2, NONE, PLTRST, NF1), /* PMC_VRALERT_N */
PAD_CFG_NF(GPP_B3, NONE, PLTRST, NF4), /* ESPI_ALERT0_N */
diff --git a/src/mainboard/siemens/fa_ehl/variants/fa_ehl/memory.c b/src/mainboard/siemens/fa_ehl/variants/fa_ehl/memory.c
index b055c4d276..8088857b28 100644
--- a/src/mainboard/siemens/fa_ehl/variants/fa_ehl/memory.c
+++ b/src/mainboard/siemens/fa_ehl/variants/fa_ehl/memory.c
@@ -6,7 +6,6 @@
#include <soc/romstage.h>
static const struct mb_cfg fa_ehl_lpddr4x_memcfg_cfg = {
-
.dq_map[DDR_CH0] = {
{0xf, 0xf0},
{0xf, 0xf0},
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/gpio.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/gpio.c
index 5cfacb8291..4b80c6696f 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/gpio.c
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/gpio.c
@@ -7,7 +7,6 @@
EDS vol 1, but some pins aren't grouped functionally in the table so those were moved for
more logical grouping. */
static const struct pad_config gpio_table[] = {
-
/* Southwest Community */
/* PCIE_WAKE[0:3]_N */
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c
index 78723c2a19..483a88cb02 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/gpio.c
@@ -7,7 +7,6 @@
EDS vol 1, but some pins aren't grouped functionally in the table so those were moved for
more logical grouping. */
static const struct pad_config gpio_table[] = {
-
/* Southwest Community */
/* EXT_WAKE0_1V8# */
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/gpio.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/gpio.c
index e7b9bd0e3a..cfab8ed062 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/gpio.c
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/gpio.c
@@ -7,7 +7,6 @@
EDS vol 1, but some pins aren't grouped functionally in the table so those were moved for
more logical grouping. */
static const struct pad_config gpio_table[] = {
-
/* Southwest Community */
/* PCIE_WAKE[0:3]_N */
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/gpio.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/gpio.c
index 593b2cd1cc..d707b3a014 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/gpio.c
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/gpio.c
@@ -7,7 +7,6 @@
EDS vol 1, but some pins aren't grouped functionally in the table so those were moved for
more logical grouping. */
static const struct pad_config gpio_table[] = {
-
/* Southwest Community */
/* PCIE_WAKE[0:3]_N */
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/gpio.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/gpio.c
index 5de6973727..f97d1a821f 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/gpio.c
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/gpio.c
@@ -7,7 +7,6 @@
EDS vol 1, but some pins aren't grouped functionally in the table so those were moved for
more logical grouping. */
static const struct pad_config gpio_table[] = {
-
/* Southwest Community */
/* PCIE_WAKE[0:3]_N */
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/memory.c b/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/memory.c
index 7b7dad1129..a800d30ef1 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/memory.c
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/memory.c
@@ -6,7 +6,6 @@
#include <soc/romstage.h>
static const struct mb_cfg mc_ehl_lpddr4x_memcfg_cfg = {
-
.dq_map[DDR_CH0] = {
{0xf, 0xf0},
{0xf, 0xf0},
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/gpio.c b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/gpio.c
index 20a89c64d1..e54f2aa2fc 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/gpio.c
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/gpio.c
@@ -5,7 +5,6 @@
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
-
/* Community 0 - GpioGroup GPP_B */
PAD_CFG_NF(GPP_B2, NONE, PLTRST, NF1), /* PMC_VRALERT_N */
PAD_CFG_NF(GPP_B3, NONE, PLTRST, NF4), /* ESPI_ALERT0_N */
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/memory.c b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/memory.c
index 7b7dad1129..a800d30ef1 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/memory.c
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/memory.c
@@ -6,7 +6,6 @@
#include <soc/romstage.h>
static const struct mb_cfg mc_ehl_lpddr4x_memcfg_cfg = {
-
.dq_map[DDR_CH0] = {
{0xf, 0xf0},
{0xf, 0xf0},
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl3/gpio.c b/src/mainboard/siemens/mc_ehl/variants/mc_ehl3/gpio.c
index cb7b273591..66b7f1d2a0 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl3/gpio.c
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl3/gpio.c
@@ -5,7 +5,6 @@
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
-
/* Community 0 - GpioGroup GPP_B */
PAD_CFG_NF(GPP_B2, NONE, PLTRST, NF1), /* PMC_VRALERT_N */
PAD_CFG_NF(GPP_B3, NONE, PLTRST, NF4), /* ESPI_ALERT0_N */
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl3/memory.c b/src/mainboard/siemens/mc_ehl/variants/mc_ehl3/memory.c
index 7b7dad1129..a800d30ef1 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl3/memory.c
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl3/memory.c
@@ -6,7 +6,6 @@
#include <soc/romstage.h>
static const struct mb_cfg mc_ehl_lpddr4x_memcfg_cfg = {
-
.dq_map[DDR_CH0] = {
{0xf, 0xf0},
{0xf, 0xf0},
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/memory.c b/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/memory.c
index f5638d5144..a352f7bacb 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/memory.c
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl4/memory.c
@@ -6,7 +6,6 @@
#include <soc/romstage.h>
static const struct mb_cfg mc_ehl_lpddr4x_memcfg_cfg = {
-
.dq_map[DDR_CH0] = {
{0xf, 0xf0},
{0xf, 0xf0},
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/gpio.c b/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/gpio.c
index a4ae8a5d2b..a81f88e771 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/gpio.c
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/gpio.c
@@ -5,7 +5,6 @@
/* Pad configuration in ramstage */
static const struct pad_config gpio_table[] = {
-
/* Community 0 - GpioGroup GPP_B */
PAD_CFG_NF(GPP_B2, NONE, PLTRST, NF1), /* PMC_VRALERT_N */
PAD_CFG_NF(GPP_B3, NONE, PLTRST, NF4), /* ESPI_ALERT0_N */
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/memory.c b/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/memory.c
index 7b7dad1129..a800d30ef1 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/memory.c
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/memory.c
@@ -6,7 +6,6 @@
#include <soc/romstage.h>
static const struct mb_cfg mc_ehl_lpddr4x_memcfg_cfg = {
-
.dq_map[DDR_CH0] = {
{0xf, 0xf0},
{0xf, 0xf0},