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-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb
index a273a5983f..f3e8a77143 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb
@@ -43,6 +43,9 @@ chip soc/intel/apollolake
# [6:0] steps of delay for HS200, each 125ps.
register "emmc_rx_cmd_data_cntl2" = "0x10008"
+ # 0:HS400(Default), 1:HS200, 2:DDR50
+ register "emmc_host_max_speed" = "2"
+
# Intel Common SoC Config
#+-------------------+---------------------------+
#| Field | Value |