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-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/README2
-rw-r--r--src/mainboard/via/epia-m700/romstage.c4
2 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/supermicro/h8dmr_fam10/README b/src/mainboard/supermicro/h8dmr_fam10/README
index 1d7bbdc822..ffcbcc021f 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/README
+++ b/src/mainboard/supermicro/h8dmr_fam10/README
@@ -17,6 +17,6 @@ while. Again, not an issue specific to this port.
* to avoid very slow LZMA decompression I use this port with LZMA compression
disabled in CBFS. I'm not sure what's causing this particular slowness.
-See also this thread: http://www.coreboot.org/pipermail/coreboot/2009-September/052107.html
+See also this thread: https://www.coreboot.org/pipermail/coreboot/2009-September/052107.html
Ward, 2009-09-22
diff --git a/src/mainboard/via/epia-m700/romstage.c b/src/mainboard/via/epia-m700/romstage.c
index 7b7140e105..f59eedb367 100644
--- a/src/mainboard/via/epia-m700/romstage.c
+++ b/src/mainboard/via/epia-m700/romstage.c
@@ -46,7 +46,7 @@
/*
* This acpi_is_wakeup_early_via_VX800 is from Rudolf's patch on the list:
- * http://www.coreboot.org/pipermail/coreboot/2008-January/028787.html.
+ * https://www.coreboot.org/pipermail/coreboot/2008-January/028787.html.
*/
static int acpi_is_wakeup_early_via_vx800(void)
{
@@ -527,7 +527,7 @@ void main(unsigned long bist)
#if PAYLOAD_IS_SEABIOS == 1
if (boot_mode == 3) {
/* An idea of Libo.Feng at amd.com in
- * http://www.coreboot.org/pipermail/coreboot/2008-December/043111.html
+ * https://www.coreboot.org/pipermail/coreboot/2008-December/043111.html
*
* I want move the 1M data, I have to set some MTRRs myself.
* Setting MTRR before back memory save s3 resume time about