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-rw-r--r--src/mainboard/intel/harcuvar/gpio.h4
-rw-r--r--src/mainboard/intel/harcuvar/romstage.c4
-rw-r--r--src/mainboard/scaleway/tagada/gpio.h4
-rw-r--r--src/mainboard/scaleway/tagada/romstage.c4
4 files changed, 8 insertions, 8 deletions
diff --git a/src/mainboard/intel/harcuvar/gpio.h b/src/mainboard/intel/harcuvar/gpio.h
index a96b435bb8..1ef465aa19 100644
--- a/src/mainboard/intel/harcuvar/gpio.h
+++ b/src/mainboard/intel/harcuvar/gpio.h
@@ -17,10 +17,10 @@
#ifndef _MAINBOARD_GPIO_H
#define _MAINBOARD_GPIO_H
-#include <soc/gpio.h>
+#include <soc/gpio_dnv.h>
#ifndef __ACPI__
-const struct pad_config harcuvar_gpio_table[] = {
+const struct dnv_pad_config harcuvar_gpio_table[] = {
// GBE0_SDP0 (GPIO_14)
{NORTH_ALL_GBE0_SDP0,
{GpioPadModeNative1, GpioHostOwnGpio, GpioDirInOut, GpioOutDefault,
diff --git a/src/mainboard/intel/harcuvar/romstage.c b/src/mainboard/intel/harcuvar/romstage.c
index f0c7cb96fe..e3a0a01166 100644
--- a/src/mainboard/intel/harcuvar/romstage.c
+++ b/src/mainboard/intel/harcuvar/romstage.c
@@ -89,7 +89,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd);
void mainboard_config_gpios(void)
{
size_t num;
- const struct pad_config *table;
+ const struct dnv_pad_config *table;
uint8_t boardid = board_id();
/* Configure pads prior to SiliconInit() in case there's any
@@ -113,7 +113,7 @@ void mainboard_config_gpios(void)
printk(BIOS_INFO, "GPIO table: 0x%x, entry num: 0x%x!\n",
(uint32_t)table, (uint32_t)num);
- gpio_configure_pads(table, num);
+ gpio_configure_dnv_pads(table, num);
}
void mainboard_memory_init_params(FSPM_UPD *mupd)
diff --git a/src/mainboard/scaleway/tagada/gpio.h b/src/mainboard/scaleway/tagada/gpio.h
index d8468f6389..68cf155da0 100644
--- a/src/mainboard/scaleway/tagada/gpio.h
+++ b/src/mainboard/scaleway/tagada/gpio.h
@@ -18,10 +18,10 @@
#ifndef _MAINBOARD_GPIO_H
#define _MAINBOARD_GPIO_H
-#include <soc/gpio.h>
+#include <soc/gpio_dnv.h>
#ifndef __ACPI__
-const struct pad_config tagada_gpio_config[] = {
+const struct dnv_pad_config tagada_gpio_config[] = {
// GBE0_SDP0 (GPIO_14) NC
/*ME { NORTH_ALL_GBE0_SDP0, { GpioPadModeNative1, GpioHostOwnGpio,
GpioDirInOut, GpioOutDefault, GpioIntDefault, GpioResetPwrGood,
diff --git a/src/mainboard/scaleway/tagada/romstage.c b/src/mainboard/scaleway/tagada/romstage.c
index c29ff9dff7..630d355785 100644
--- a/src/mainboard/scaleway/tagada/romstage.c
+++ b/src/mainboard/scaleway/tagada/romstage.c
@@ -31,7 +31,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd);
void mainboard_config_gpios(void)
{
size_t num;
- const struct pad_config *table;
+ const struct dnv_pad_config *table;
printk(BIOS_SPEW, "Board Serial: %s.\n", bmcinfo_serial());
/* Configure pads prior to SiliconInit() in case there's any
@@ -47,7 +47,7 @@ void mainboard_config_gpios(void)
printk(BIOS_INFO, "GPIO table: 0x%x, entry num: 0x%x!\n",
(uint32_t)table, (uint32_t)num);
- gpio_configure_pads(table, num);
+ gpio_configure_dnv_pads(table, num);
}
void mainboard_memory_init_params(FSPM_UPD *mupd)