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-rw-r--r--src/mainboard/google/auron/Kconfig1
-rw-r--r--src/mainboard/google/auron/devicetree.cb9
-rw-r--r--src/mainboard/google/auron/variants/buddy/overridetree.cb9
-rw-r--r--src/mainboard/google/auron/variants/samus/overridetree.cb19
4 files changed, 29 insertions, 9 deletions
diff --git a/src/mainboard/google/auron/Kconfig b/src/mainboard/google/auron/Kconfig
index 5301e32571..293a973071 100644
--- a/src/mainboard/google/auron/Kconfig
+++ b/src/mainboard/google/auron/Kconfig
@@ -1,6 +1,7 @@
config BOARD_GOOGLE_BASEBOARD_AURON
def_bool n
+ select CPU_INTEL_HASWELL
select SOC_INTEL_BROADWELL
select BOARD_ROMSIZE_KB_8192
select EC_GOOGLE_CHROMEEC
diff --git a/src/mainboard/google/auron/devicetree.cb b/src/mainboard/google/auron/devicetree.cb
index 8bf2c129a4..39c6554f1e 100644
--- a/src/mainboard/google/auron/devicetree.cb
+++ b/src/mainboard/google/auron/devicetree.cb
@@ -12,10 +12,13 @@ chip soc/intel/broadwell
# Enable HDMI Hotplug with 6ms pulse
register "gpu_dp_b_hotplug" = "0x06"
- register "s0ix_enable" = "1"
-
device cpu_cluster 0 on
- device lapic 0 on end
+ chip cpu/intel/haswell
+ register "s0ix_enable" = "1"
+
+ device lapic 0 on end
+ device lapic 0xacac off end
+ end
end
device domain 0 on
diff --git a/src/mainboard/google/auron/variants/buddy/overridetree.cb b/src/mainboard/google/auron/variants/buddy/overridetree.cb
index 6762eb42c4..0570cdca55 100644
--- a/src/mainboard/google/auron/variants/buddy/overridetree.cb
+++ b/src/mainboard/google/auron/variants/buddy/overridetree.cb
@@ -9,7 +9,14 @@ chip soc/intel/broadwell
.backlight_pwm_hz = 200,
}"
- register "s0ix_enable" = "0"
+ device cpu_cluster 0 on
+ chip cpu/intel/haswell
+ register "s0ix_enable" = "0"
+
+ device lapic 0 on end
+ device lapic 0xacac off end
+ end
+ end
device domain 0 on
chip soc/intel/broadwell/pch
diff --git a/src/mainboard/google/auron/variants/samus/overridetree.cb b/src/mainboard/google/auron/variants/samus/overridetree.cb
index 34a785b711..0a92efe70b 100644
--- a/src/mainboard/google/auron/variants/samus/overridetree.cb
+++ b/src/mainboard/google/auron/variants/samus/overridetree.cb
@@ -12,11 +12,20 @@ chip soc/intel/broadwell
.backlight_pwm_hz = 200,
}"
- register "vr_slow_ramp_rate_set" = "3"
- register "vr_slow_ramp_rate_enable" = "1"
-
- # Disable S0ix for now
- register "s0ix_enable" = "0"
+ device cpu_cluster 0 on
+ chip cpu/intel/haswell
+ # Disable S0ix for now
+ register "s0ix_enable" = "0"
+
+ register "vr_config" = "{
+ .slow_ramp_rate_set = 3,
+ .slow_ramp_rate_enable = true,
+ }"
+
+ device lapic 0 on end
+ device lapic 0xacac off end
+ end
+ end
device domain 0 on
chip soc/intel/broadwell/pch