diff options
Diffstat (limited to 'src/mainboard')
83 files changed, 489 insertions, 489 deletions
diff --git a/src/mainboard/amd/dbm690t/romstage.c b/src/mainboard/amd/dbm690t/romstage.c index b46ca394be..3c808d41cb 100644 --- a/src/mainboard/amd/dbm690t/romstage.c +++ b/src/mainboard/amd/dbm690t/romstage.c @@ -177,7 +177,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) printk(BIOS_DEBUG, "needs_reset=0x%x\n", needs_reset); if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/amd/mahogany/romstage.c b/src/mainboard/amd/mahogany/romstage.c index a5991ad1eb..3dc2801546 100644 --- a/src/mainboard/amd/mahogany/romstage.c +++ b/src/mainboard/amd/mahogany/romstage.c @@ -176,7 +176,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) printk(BIOS_DEBUG, "needs_reset=0x%x\n", needs_reset); if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/amd/pistachio/romstage.c b/src/mainboard/amd/pistachio/romstage.c index f8b64f1320..6cdaf42df5 100644 --- a/src/mainboard/amd/pistachio/romstage.c +++ b/src/mainboard/amd/pistachio/romstage.c @@ -183,7 +183,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_code(0x06); if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/amd/rumba/romstage.c b/src/mainboard/amd/rumba/romstage.c index e9b21ed029..813b009471 100644 --- a/src/mainboard/amd/rumba/romstage.c +++ b/src/mainboard/amd/rumba/romstage.c @@ -50,7 +50,7 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl) /* get module banks (sides) per dimm, SPD byte 5 */ module_banks = spd_read_byte(0xA0, 5); if (module_banks < 1 || module_banks > 2) - print_err("Module banks per dimm\r\n"); + print_err("Module banks per dimm\n"); module_banks >>= 1; msr.hi &= ~(1 << CF07_UPPER_D0_MB_SHIFT); msr.hi |= (module_banks << CF07_UPPER_D0_MB_SHIFT); @@ -58,7 +58,7 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl) /* get component banks per module bank, SPD byte 17 */ val = spd_read_byte(0xA0, 17); if (val < 2 || val > 4) - print_err("Component banks per module bank\r\n"); + print_err("Component banks per module bank\n"); val >>= 2; msr.hi &= ~(0x1 << CF07_UPPER_D0_CB_SHIFT); msr.hi |= (val << CF07_UPPER_D0_CB_SHIFT); @@ -78,7 +78,7 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl) print_debug("computed msr.hi "); print_debug_hex32(msr.hi); - print_debug("\r\n"); + print_debug("\n"); msr.lo = 0x00003000; wrmsr(MC_CF07_DATA, msr); diff --git a/src/mainboard/amd/serengeti_cheetah/ap_romstage.c b/src/mainboard/amd/serengeti_cheetah/ap_romstage.c index 582e93abc2..c2b8e8c7b3 100644 --- a/src/mainboard/amd/serengeti_cheetah/ap_romstage.c +++ b/src/mainboard/amd/serengeti_cheetah/ap_romstage.c @@ -69,7 +69,7 @@ void hardwaremain(int ret_addr) #if CONFIG_USE_PRINTK_IN_CAR printk(BIOS_DEBUG, "CODE IN CACHE ON NODE: %02x\n"); #else - print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\r\n"); + print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n"); #endif train_ram(id.nodeid, sysinfo, sysinfox); diff --git a/src/mainboard/amd/serengeti_cheetah/romstage.c b/src/mainboard/amd/serengeti_cheetah/romstage.c index c46bdf447d..b45e4f6716 100644 --- a/src/mainboard/amd/serengeti_cheetah/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah/romstage.c @@ -92,14 +92,14 @@ static inline void change_i2c_mux(unsigned device) { #define SMBUS_HUB 0x18 int ret, i; - print_debug("change_i2c_mux i="); print_debug_hex8(device); print_debug("\r\n"); + print_debug("change_i2c_mux i="); print_debug_hex8(device); print_debug("\n"); i=2; do { ret = smbus_write_byte(SMBUS_HUB, 0x01, device); - print_debug("change_i2c_mux 1 ret="); print_debug_hex32(ret); print_debug("\r\n"); + print_debug("change_i2c_mux 1 ret="); print_debug_hex32(ret); print_debug("\n"); } while ((ret!=0) && (i-->0)); ret = smbus_write_byte(SMBUS_HUB, 0x03, 0); - print_debug("change_i2c_mux 2 ret="); print_debug_hex32(ret); print_debug("\r\n"); + print_debug("change_i2c_mux 2 ret="); print_debug_hex32(ret); print_debug("\n"); } #endif @@ -209,7 +209,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) dump_pci_device(PCI_DEV(0, 0x19, 0)); #endif - print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\r\n"); + print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n"); #if CONFIG_MEM_TRAIN_SEQ == 1 set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram @@ -246,7 +246,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* Read FIDVID_STATUS */ msr_t msr; msr=rdmsr(0xc0010042); - print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); + print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); } @@ -260,7 +260,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { msr_t msr; msr=rdmsr(0xc0010042); - print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); + print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); } @@ -276,7 +276,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) // fidvid change will issue one LDTSTOP and the HT change will be effective too if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset_x(sysinfo->sbbusn, sysinfo->sbdn); } #endif diff --git a/src/mainboard/arima/hdama/debug.c b/src/mainboard/arima/hdama/debug.c index 55c62649c8..0db327c5c6 100644 --- a/src/mainboard/arima/hdama/debug.c +++ b/src/mainboard/arima/hdama/debug.c @@ -23,7 +23,7 @@ static void print_pci_devices(void) continue; } print_debug_pci_dev(dev); - print_debug("\r\n"); + print_debug("\n"); } } @@ -31,7 +31,7 @@ static void dump_pci_device(unsigned dev) { int i; print_debug_pci_dev(dev); - print_debug("\r\n"); + print_debug("\n"); for(i = 0; i <= 255; i++) { unsigned char val; @@ -43,7 +43,7 @@ static void dump_pci_device(unsigned dev) print_debug_char(' '); print_debug_hex8(val); if ((i & 0x0f) == 0x0f) { - print_debug("\r\n"); + print_debug("\n"); } } } @@ -70,7 +70,7 @@ static void dump_spd_registers(int controllers, const struct mem_controller *ctr int n; for(n = 0; n < controllers; n++) { int i; - print_debug("\r\n"); + print_debug("\n"); activate_spd_rom(&ctrl[n]); for(i = 0; i < 4; i++) { unsigned device; @@ -87,13 +87,13 @@ static void dump_spd_registers(int controllers, const struct mem_controller *ctr int status; unsigned char byte; if ((j & 0xf) == 0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex8(j); print_debug(": "); } status = spd_read_byte(device, j); if (status < 0) { - print_debug("bad device\r\n"); + print_debug("bad device\n"); break; } #if 0 @@ -104,7 +104,7 @@ static void dump_spd_registers(int controllers, const struct mem_controller *ctr #endif print_debug_char(' '); } - print_debug("\r\n"); + print_debug("\n"); } device = ctrl[n].channel1[i]; if (device) { @@ -119,13 +119,13 @@ static void dump_spd_registers(int controllers, const struct mem_controller *ctr int status; unsigned char byte; if ((j & 0xf) == 0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex8(j); print_debug(": "); } status = spd_read_byte(device, j); if (status < 0) { - print_debug("bad device\r\n"); + print_debug("bad device\n"); break; } #if 0 @@ -136,7 +136,7 @@ static void dump_spd_registers(int controllers, const struct mem_controller *ctr #endif print_debug_char(' '); } - print_debug("\r\n"); + print_debug("\n"); } } } diff --git a/src/mainboard/arima/hdama/romstage.c b/src/mainboard/arima/hdama/romstage.c index 3440e717c0..cdf4b3901a 100644 --- a/src/mainboard/arima/hdama/romstage.c +++ b/src/mainboard/arima/hdama/romstage.c @@ -148,7 +148,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) needs_reset |= ht_setup_chains_x(); if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/asus/a8n_e/romstage.c b/src/mainboard/asus/a8n_e/romstage.c index b64ccae0fd..eb8ad4f777 100644 --- a/src/mainboard/asus/a8n_e/romstage.c +++ b/src/mainboard/asus/a8n_e/romstage.c @@ -165,7 +165,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) needs_reset |= ck804_early_setup_x(); if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/asus/a8v-e_se/romstage.c b/src/mainboard/asus/a8v-e_se/romstage.c index c2390c76d1..7f57ddcb1c 100644 --- a/src/mainboard/asus/a8v-e_se/romstage.c +++ b/src/mainboard/asus/a8v-e_se/romstage.c @@ -89,7 +89,7 @@ void soft_reset(void) uint8_t tmp; set_bios_reset(); - print_debug("soft reset \r\n"); + print_debug("soft reset \n"); /* PCI reset */ tmp = pci_read_config8(PCI_DEV(0, 0x11, 0), 0x4f); @@ -195,7 +195,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) console_init(); enable_rom_decode(); - print_info("now booting... fallback\r\n"); + print_info("now booting... fallback\n"); /* Is this a CPU only reset? Or is this a secondary CPU? */ if (!cpu_init_detectedx && boot_cpu()) { @@ -210,7 +210,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) console_init(); enable_rom_decode(); - print_info("now booting... real_main\r\n"); + print_info("now booting... real_main\n"); if (bist == 0) bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo); @@ -222,7 +222,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) setup_coherent_ht_domain(); wait_all_core0_started(); - print_info("now booting... Core0 started\r\n"); + print_info("now booting... Core0 started\n"); #if CONFIG_LOGICAL_CPUS==1 /* It is said that we should start core1 after all core0 launched. */ @@ -237,7 +237,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) needs_reset |= k8t890_early_setup_ht(); if (needs_reset) { - print_debug("ht reset -\r\n"); + print_debug("ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/asus/m2v-mx_se/romstage.c b/src/mainboard/asus/m2v-mx_se/romstage.c index 2514019aa6..5b542a2985 100644 --- a/src/mainboard/asus/m2v-mx_se/romstage.c +++ b/src/mainboard/asus/m2v-mx_se/romstage.c @@ -105,12 +105,12 @@ void activate_spd_rom(const struct mem_controller *ctrl) /* this function might fail on some K8 CPUs with errata #181 */ static void ldtstop_sb(void) { - print_debug("toggle LDTSTP#\r\n"); + print_debug("toggle LDTSTP#\n"); u8 reg = inb (VT8237R_ACPI_IO_BASE + 0x5c); reg = reg ^ (1 << 0); outb(reg, VT8237R_ACPI_IO_BASE + 0x5c); reg = inb(VT8237R_ACPI_IO_BASE + 0x15); - print_debug("done\r\n"); + print_debug("done\n"); } #include "cpu/amd/model_fxx/fidvid.c" @@ -127,7 +127,7 @@ void soft_reset(void) uint8_t tmp; set_bios_reset(); - print_debug("soft reset \r\n"); + print_debug("soft reset \n"); /* PCI reset */ tmp = pci_read_config8(PCI_DEV(0, 0x11, 0), 0x4f); @@ -188,7 +188,7 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx) console_init(); enable_rom_decode(); - print_info("now booting... real_main\r\n"); + print_info("now booting... real_main\n"); if (bist == 0) bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo); @@ -199,7 +199,7 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx) setup_coherent_ht_domain(); wait_all_core0_started(); - print_info("now booting... Core0 started\r\n"); + print_info("now booting... Core0 started\n"); #if CONFIG_LOGICAL_CPUS==1 /* It is said that we should start core1 after all core0 launched. */ @@ -222,9 +222,9 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx) if (needs_reset) { print_debug_hex8(needs_reset); - print_debug("Xht reset -\r\n"); + print_debug("Xht reset -\n"); soft_reset(); - print_debug("NO reset\r\n"); + print_debug("NO reset\n"); } @@ -233,7 +233,7 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx) vt8237_sb_enable_fid_vid(); enable_fid_change(); - print_debug("after enable_fid_change\r\n"); + print_debug("after enable_fid_change\n"); init_fidvid_bsp(bsp_apicid); diff --git a/src/mainboard/bcom/winnetp680/romstage.c b/src/mainboard/bcom/winnetp680/romstage.c index 2801f9e06a..f1511574d4 100644 --- a/src/mainboard/bcom/winnetp680/romstage.c +++ b/src/mainboard/bcom/winnetp680/romstage.c @@ -101,26 +101,26 @@ static void main(unsigned long bist) uart_init(); console_init(); - print_spew("In romstage.c:main()\r\n"); + print_spew("In romstage.c:main()\n"); enable_smbus(); smbus_fixup(&ctrl); if (bist == 0) { - print_debug("doing early_mtrr\r\n"); + print_debug("doing early_mtrr\n"); early_mtrr_init(); } /* Halt if there was a built-in self test failure. */ report_bist_failure(bist); - print_debug("Enabling mainboard devices\r\n"); + print_debug("Enabling mainboard devices\n"); enable_mainboard_devices(); ddr_ram_setup(&ctrl); /* ram_check(0, 640 * 1024); */ - print_spew("Leaving romstage.c:main()\r\n"); + print_spew("Leaving romstage.c:main()\n"); } diff --git a/src/mainboard/broadcom/blast/romstage.c b/src/mainboard/broadcom/blast/romstage.c index 71211c587c..37751ce27a 100644 --- a/src/mainboard/broadcom/blast/romstage.c +++ b/src/mainboard/broadcom/blast/romstage.c @@ -70,9 +70,9 @@ static inline void change_i2c_mux(unsigned device) { #define SMBUS_HUB 0x71 int ret; - print_debug("change_i2c_mux i="); print_debug_hex8(device); print_debug("\r\n"); + print_debug("change_i2c_mux i="); print_debug_hex8(device); print_debug("\n"); ret = smbus_send_byte(SMBUS_HUB, device); - print_debug("change_i2c_mux ret="); print_debug_hex32(ret); print_debug("\r\n"); + print_debug("change_i2c_mux ret="); print_debug_hex32(ret); print_debug("\n"); } #endif @@ -152,7 +152,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* Halt if there was a built in self test failure */ report_bist_failure(bist); - print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\r\n"); + print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n"); setup_blast_resource_map(); @@ -175,7 +175,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) bcm5785_early_setup(); if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/dell/s1850/debug.c b/src/mainboard/dell/s1850/debug.c index 766a819d52..2ea3db32ea 100644 --- a/src/mainboard/dell/s1850/debug.c +++ b/src/mainboard/dell/s1850/debug.c @@ -12,7 +12,7 @@ static void print_reg(unsigned char index) print_debug_hex8(index); print_debug(": 0x"); print_debug_hex8(data); - print_debug("\r\n"); + print_debug("\n"); return; } @@ -49,52 +49,52 @@ static void siodump(void) int i; unsigned char data; - print_debug("\r\n*** SERVER I/O REGISTERS ***\r\n"); + print_debug("\n*** SERVER I/O REGISTERS ***\n"); for (i=0x10; i<=0x2d; i++) { print_reg((unsigned char)i); } #if 0 - print_debug("\r\n*** XBUS REGISTERS ***\r\n"); + print_debug("\n*** XBUS REGISTERS ***\n"); setup_func(0x0f); for (i=0xf0; i<=0xff; i++) { print_reg((unsigned char)i); } - print_debug("\r\n*** SERIAL 1 CONFIG REGISTERS ***\r\n"); + print_debug("\n*** SERIAL 1 CONFIG REGISTERS ***\n"); setup_func(0x03); print_reg(0xf0); - print_debug("\r\n*** SERIAL 2 CONFIG REGISTERS ***\r\n"); + print_debug("\n*** SERIAL 2 CONFIG REGISTERS ***\n"); setup_func(0x02); print_reg(0xf0); #endif - print_debug("\r\n*** GPIO REGISTERS ***\r\n"); + print_debug("\n*** GPIO REGISTERS ***\n"); setup_func(0x07); for (i=0xf0; i<=0xf8; i++) { print_reg((unsigned char)i); } - print_debug("\r\n*** GPIO VALUES ***\r\n"); + print_debug("\n*** GPIO VALUES ***\n"); data = inb(0x68a); - print_debug("\r\nGPDO 4: 0x"); + print_debug("\nGPDO 4: 0x"); print_debug_hex8(data); data = inb(0x68b); - print_debug("\r\nGPDI 4: 0x"); + print_debug("\nGPDI 4: 0x"); print_debug_hex8(data); - print_debug("\r\n"); + print_debug("\n"); #if 0 - print_debug("\r\n*** WATCHDOG TIMER REGISTERS ***\r\n"); + print_debug("\n*** WATCHDOG TIMER REGISTERS ***\n"); setup_func(0x0a); print_reg(0xf0); - print_debug("\r\n*** FAN CONTROL REGISTERS ***\r\n"); + print_debug("\n*** FAN CONTROL REGISTERS ***\n"); setup_func(0x09); print_reg(0xf0); print_reg(0xf1); - print_debug("\r\n*** RTC REGISTERS ***\r\n"); + print_debug("\n*** RTC REGISTERS ***\n"); setup_func(0x10); print_reg(0xf0); print_reg(0xf1); @@ -104,7 +104,7 @@ static void siodump(void) print_reg(0xfe); print_reg(0xff); - print_debug("\r\n*** HEALTH MONITORING & CONTROL REGISTERS ***\r\n"); + print_debug("\n*** HEALTH MONITORING & CONTROL REGISTERS ***\n"); setup_func(0x14); print_reg(0xf0); #endif @@ -135,7 +135,7 @@ static void print_pci_devices(void) continue; } print_debug_pci_dev(dev); - print_debug("\r\n"); + print_debug("\n"); } } @@ -143,7 +143,7 @@ static void dump_pci_device(unsigned dev) { int i; print_debug_pci_dev(dev); - print_debug("\r\n"); + print_debug("\n"); for(i = 0; i <= 255; i++) { unsigned char val; @@ -155,7 +155,7 @@ static void dump_pci_device(unsigned dev) print_debug_char(' '); print_debug_hex8(val); if ((i & 0x0f) == 0x0f) { - print_debug("\r\n"); + print_debug("\n"); } } } @@ -165,7 +165,7 @@ static void dump_bar14(unsigned dev) int i; unsigned long bar; - print_debug("BAR 14 Dump\r\n"); + print_debug("BAR 14 Dump\n"); bar = pci_read_config32(dev, 0x14); for(i = 0; i <= 0x300; i+=4) { @@ -178,14 +178,14 @@ static void dump_bar14(unsigned dev) val = pci_read_config8(dev, i); #endif if((i%4)==0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex16(i); print_debug_char(' '); } print_debug_hex32(read32(bar + i)); print_debug_char(' '); } - print_debug("\r\n"); + print_debug("\n"); } static void dump_pci_devices(void) @@ -212,14 +212,14 @@ void dump_spd_registers(void) while(device <= SMBUS_MEM_DEVICE_END) { int status = 0; int i; - print_debug("\r\n"); + print_debug("\n"); print_debug("dimm "); print_debug_hex8(device); for(i = 0; (i < 256) ; i++) { unsigned char byte; if ((i % 16) == 0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex8(i); print_debug(": "); } @@ -227,7 +227,7 @@ void dump_spd_registers(void) if (status < 0) { print_debug("bad device: "); print_debug_hex8(-status); - print_debug("\r\n"); + print_debug("\n"); break; } print_debug_hex8(status); @@ -245,7 +245,7 @@ void show_dram_slots(void) while(device <= SMBUS_MEM_DEVICE_END) { int status = 0; int i; - print_debug("\r\n"); + print_debug("\n"); print_debug("dimm "); print_debug_hex8(device); @@ -256,7 +256,7 @@ void show_dram_slots(void) print_debug("present: "); } print_debug_hex8(status); - print_debug("\r\n"); + print_debug("\n"); device += SMBUS_MEM_DEVICE_INC; print_debug("\n"); } @@ -269,7 +269,7 @@ void dump_ipmi_registers(void) while(device <= 0x42) { int status = 0; int i; - print_debug("\r\n"); + print_debug("\n"); print_debug("ipmi "); print_debug_hex8(device); @@ -279,7 +279,7 @@ void dump_ipmi_registers(void) if (status < 0) { print_debug("bad device: "); print_debug_hex8(-status); - print_debug("\r\n"); + print_debug("\n"); break; } print_debug_hex8(status); diff --git a/src/mainboard/dell/s1850/watchdog.c b/src/mainboard/dell/s1850/watchdog.c index e22ffeef80..50e9e6e7b0 100644 --- a/src/mainboard/dell/s1850/watchdog.c +++ b/src/mainboard/dell/s1850/watchdog.c @@ -52,6 +52,6 @@ static void disable_watchdogs(void) { // disable_sio_watchdog(NSC_WD_DEV); disable_ich5_watchdog(); - print_debug("Watchdogs disabled\r\n"); + print_debug("Watchdogs disabled\n"); } diff --git a/src/mainboard/digitallogic/msm586seg/romstage.c b/src/mainboard/digitallogic/msm586seg/romstage.c index 4865622181..1814634277 100644 --- a/src/mainboard/digitallogic/msm586seg/romstage.c +++ b/src/mainboard/digitallogic/msm586seg/romstage.c @@ -80,7 +80,7 @@ static inline void dumpmem(void){ print_err_hex8(c); print_err(" "); } - print_err("\r\n"); + print_err("\n"); } } @@ -190,16 +190,16 @@ static void main(unsigned long bist) uart_init(); console_init(); for(i = 0; i < 100; i++) - print_err("fill usart\r\n"); + print_err("fill usart\n"); // while(1) - print_err("HI THERE!\r\n"); + print_err("HI THERE!\n"); // sizemem(); staticmem(); print_err("c60 is "); print_err_hex16(*(unsigned short *)0xfffefc60); print_err("\n"); // while(1) - print_err("STATIC MEM DONE\r\n"); + print_err("STATIC MEM DONE\n"); outb(0xee, 0x80); print_err("loop forever ...\n"); @@ -227,12 +227,12 @@ static void main(unsigned long bist) #endif #if 0 - print_err("RAM CHECK!\r\n"); + print_err("RAM CHECK!\n"); // Check 16MB of memory @ 0 ram_check(0x00000000, 0x01000000); #endif #if 0 - print_err("RAM CHECK for 32 MB!\r\n"); + print_err("RAM CHECK for 32 MB!\n"); // Check 32MB of memory @ 0 ram_check(0x00000000, 0x02000000); #endif @@ -243,17 +243,17 @@ static void main(unsigned long bist) for(i = 0; i < 0x20000; i++) { /* print_err("Set dst "); print_err_hex32((unsigned long) dst); - print_err(" to "); print_err_hex32(*src); print_err("\r\n"); + print_err(" to "); print_err_hex32(*src); print_err("\n"); */ *dst = *src; - //print_err(" dst is now "); print_err_hex32(*dst); print_err("\r\n"); + //print_err(" dst is now "); print_err_hex32(*dst); print_err("\n"); dst++, src++; outb((unsigned char)i, 0x80); } } dumpmem(); outb(0, 0x80); - print_err("loop forever\r\n"); + print_err("loop forever\n"); outb(0xdd, 0x80); __asm__ volatile( "movl %0, %%edi\n\t" @@ -262,7 +262,7 @@ static void main(unsigned long bist) : "a" (0x4000) ); - print_err("Oh dear, I'm afraid it didn't work...\r\n"); + print_err("Oh dear, I'm afraid it didn't work...\n"); while(1); #endif diff --git a/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c index d0a5eeb351..e42a312400 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c +++ b/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c @@ -84,7 +84,7 @@ void hardwaremain(int ret_addr) id = get_node_core_id_x(); //FIXME: for USBDEBUG_DIRECT you need to make sure dbg_info get assigned in AP - print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\r\n"); + print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n"); train_ram(id.nodeid, sysinfo, sysinfox); diff --git a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c index d66bf51f59..7a0d910884 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c +++ b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c @@ -215,7 +215,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) console_init(); printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1); - print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\r\n"); + print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n"); #if CONFIG_MEM_TRAIN_SEQ == 1 set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram @@ -241,7 +241,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { msr_t msr; msr=rdmsr(0xc0010042); - print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); + print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); } @@ -255,7 +255,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { msr_t msr; msr=rdmsr(0xc0010042); - print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); + print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); } #endif @@ -265,7 +265,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) // fidvid change will issue one LDTSTOP and the HT change will be effective too if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } allow_all_aps_stop(bsp_apicid); diff --git a/src/mainboard/gigabyte/m57sli/ap_romstage.c b/src/mainboard/gigabyte/m57sli/ap_romstage.c index 2bd3205842..28f47597e9 100644 --- a/src/mainboard/gigabyte/m57sli/ap_romstage.c +++ b/src/mainboard/gigabyte/m57sli/ap_romstage.c @@ -82,7 +82,7 @@ void hardwaremain(int ret_addr) id = get_node_core_id_x(); //FIXME: for USBDEBUG_DIRECT you need to make sure dbg_info get assigned in AP - print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\r\n"); + print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n"); train_ram(id.nodeid, sysinfo, sysinfox); diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c index 9ac67e465f..964e8048b3 100644 --- a/src/mainboard/gigabyte/m57sli/romstage.c +++ b/src/mainboard/gigabyte/m57sli/romstage.c @@ -228,7 +228,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) console_init(); printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1); - print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\r\n"); + print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n"); #if CONFIG_MEM_TRAIN_SEQ == 1 set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram @@ -254,7 +254,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { msr_t msr; msr=rdmsr(0xc0010042); - print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); + print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); } @@ -268,7 +268,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { msr_t msr; msr=rdmsr(0xc0010042); - print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); + print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); } #endif @@ -279,7 +279,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) // fidvid change will issue one LDTSTOP and the HT change will be effective too if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } allow_all_aps_stop(bsp_apicid); diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c index c70ff27556..f7897db6ee 100644 --- a/src/mainboard/hp/dl145_g3/romstage.c +++ b/src/mainboard/hp/dl145_g3/romstage.c @@ -230,7 +230,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) pilot_early_init(SERIAL_DEV); //config port is being taken from SERIAL_DEV printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1); - print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\r\n"); + print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n"); #if CONFIG_MEM_TRAIN_SEQ == 1 set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram @@ -256,7 +256,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { msr_t msr; msr=rdmsr(0xc0010042); - print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); + print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); } enable_fid_change(); enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn); @@ -265,7 +265,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { msr_t msr; msr=rdmsr(0xc0010042); - print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); + print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); } #endif @@ -274,7 +274,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) // fidvid change will issue one LDTSTOP and the HT change will be effective too if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/ibm/e325/romstage.c b/src/mainboard/ibm/e325/romstage.c index ab42a7ef9d..cde7fbdc5d 100644 --- a/src/mainboard/ibm/e325/romstage.c +++ b/src/mainboard/ibm/e325/romstage.c @@ -151,7 +151,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) needs_reset |= ht_setup_chains_x(); if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/ibm/e326/romstage.c b/src/mainboard/ibm/e326/romstage.c index 9bbad71346..508b751b06 100644 --- a/src/mainboard/ibm/e326/romstage.c +++ b/src/mainboard/ibm/e326/romstage.c @@ -151,7 +151,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) needs_reset |= ht_setup_chains_x(); if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/intel/eagleheights/debug.c b/src/mainboard/intel/eagleheights/debug.c index 5a24c4a3ca..9aec7aa65e 100644 --- a/src/mainboard/intel/eagleheights/debug.c +++ b/src/mainboard/intel/eagleheights/debug.c @@ -34,7 +34,7 @@ static void print_reg(unsigned char index) print_debug_hex8(index); print_debug(": 0x"); print_debug_hex8(data); - print_debug("\r\n"); + print_debug("\n"); return; } @@ -71,52 +71,52 @@ static void siodump(void) int i; unsigned char data; - print_debug("\r\n*** SERVER I/O REGISTERS ***\r\n"); + print_debug("\n*** SERVER I/O REGISTERS ***\n"); for (i=0x10; i<=0x2d; i++) { print_reg((unsigned char)i); } #if 0 - print_debug("\r\n*** XBUS REGISTERS ***\r\n"); + print_debug("\n*** XBUS REGISTERS ***\n"); setup_func(0x0f); for (i=0xf0; i<=0xff; i++) { print_reg((unsigned char)i); } - print_debug("\r\n*** SERIAL 1 CONFIG REGISTERS ***\r\n"); + print_debug("\n*** SERIAL 1 CONFIG REGISTERS ***\n"); setup_func(0x03); print_reg(0xf0); - print_debug("\r\n*** SERIAL 2 CONFIG REGISTERS ***\r\n"); + print_debug("\n*** SERIAL 2 CONFIG REGISTERS ***\n"); setup_func(0x02); print_reg(0xf0); #endif - print_debug("\r\n*** GPIO REGISTERS ***\r\n"); + print_debug("\n*** GPIO REGISTERS ***\n"); setup_func(0x07); for (i=0xf0; i<=0xf8; i++) { print_reg((unsigned char)i); } - print_debug("\r\n*** GPIO VALUES ***\r\n"); + print_debug("\n*** GPIO VALUES ***\n"); data = inb(0x68a); - print_debug("\r\nGPDO 4: 0x"); + print_debug("\nGPDO 4: 0x"); print_debug_hex8(data); data = inb(0x68b); - print_debug("\r\nGPDI 4: 0x"); + print_debug("\nGPDI 4: 0x"); print_debug_hex8(data); - print_debug("\r\n"); + print_debug("\n"); #if 0 - print_debug("\r\n*** WATCHDOG TIMER REGISTERS ***\r\n"); + print_debug("\n*** WATCHDOG TIMER REGISTERS ***\n"); setup_func(0x0a); print_reg(0xf0); - print_debug("\r\n*** FAN CONTROL REGISTERS ***\r\n"); + print_debug("\n*** FAN CONTROL REGISTERS ***\n"); setup_func(0x09); print_reg(0xf0); print_reg(0xf1); - print_debug("\r\n*** RTC REGISTERS ***\r\n"); + print_debug("\n*** RTC REGISTERS ***\n"); setup_func(0x10); print_reg(0xf0); print_reg(0xf1); @@ -126,7 +126,7 @@ static void siodump(void) print_reg(0xfe); print_reg(0xff); - print_debug("\r\n*** HEALTH MONITORING & CONTROL REGISTERS ***\r\n"); + print_debug("\n*** HEALTH MONITORING & CONTROL REGISTERS ***\n"); setup_func(0x14); print_reg(0xf0); #endif @@ -157,7 +157,7 @@ static void print_pci_devices(void) continue; } print_debug_pci_dev(dev); - print_debug("\r\n"); + print_debug("\n"); } } @@ -165,7 +165,7 @@ static void dump_pci_device(unsigned dev) { int i; print_debug_pci_dev(dev); - print_debug("\r\n"); + print_debug("\n"); for(i = 0; i <= 255; i++) { unsigned char val; @@ -177,7 +177,7 @@ static void dump_pci_device(unsigned dev) print_debug_char(' '); print_debug_hex8(val); if ((i & 0x0f) == 0x0f) { - print_debug("\r\n"); + print_debug("\n"); } } } @@ -187,7 +187,7 @@ static void dump_bar14(unsigned dev) int i; unsigned long bar; - print_debug("BAR 14 Dump\r\n"); + print_debug("BAR 14 Dump\n"); bar = pci_read_config32(dev, 0x14); for(i = 0; i <= 0x300; i+=4) { @@ -200,14 +200,14 @@ static void dump_bar14(unsigned dev) val = pci_read_config8(dev, i); #endif if((i%4)==0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex16(i); print_debug_char(' '); } print_debug_hex32(read32(bar + i)); print_debug_char(' '); } - print_debug("\r\n"); + print_debug("\n"); } static void dump_pci_devices(void) @@ -231,7 +231,7 @@ static void dump_pci_devices(void) static void dump_spd_registers(const struct mem_controller *ctrl) { int i; - print_debug("\r\n"); + print_debug("\n"); for(i = 0; i < 4; i++) { unsigned device; device = ctrl->channel0[i]; @@ -245,20 +245,20 @@ static void dump_spd_registers(const struct mem_controller *ctrl) int status; unsigned char byte; if ((j & 0xf) == 0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex8(j); print_debug(": "); } status = smbus_read_byte(device, j); if (status < 0) { - print_debug("bad device\r\n"); + print_debug("bad device\n"); break; } byte = status & 0xff; print_debug_hex8(byte); print_debug_char(' '); } - print_debug("\r\n"); + print_debug("\n"); } device = ctrl->channel1[i]; if (device) { @@ -271,20 +271,20 @@ static void dump_spd_registers(const struct mem_controller *ctrl) int status; unsigned char byte; if ((j & 0xf) == 0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex8(j); print_debug(": "); } status = smbus_read_byte(device, j); if (status < 0) { - print_debug("bad device\r\n"); + print_debug("bad device\n"); break; } byte = status & 0xff; print_debug_hex8(byte); print_debug_char(' '); } - print_debug("\r\n"); + print_debug("\n"); } } } @@ -297,13 +297,13 @@ void dump_spd_registers(void) while(device <= SMBUS_MEM_DEVICE_END) { int status = 0; int i; - print_debug("\r\n"); + print_debug("\n"); print_debug("dimm "); print_debug_hex8(device); for(i = 0; (i < 256) ; i++) { if ((i % 16) == 0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex8(i); print_debug(": "); } @@ -311,7 +311,7 @@ void dump_spd_registers(void) if (status < 0) { print_debug("bad device: "); print_debug_hex8(-status); - print_debug("\r\n"); + print_debug("\n"); break; } print_debug_hex8(status); @@ -329,7 +329,7 @@ void dump_ipmi_registers(void) while(device <= 0x42) { int status = 0; int i; - print_debug("\r\n"); + print_debug("\n"); print_debug("ipmi "); print_debug_hex8(device); @@ -338,7 +338,7 @@ void dump_ipmi_registers(void) if (status < 0) { print_debug("bad device: "); print_debug_hex8(-status); - print_debug("\r\n"); + print_debug("\n"); break; } print_debug_hex8(status); diff --git a/src/mainboard/intel/jarrell/debug.c b/src/mainboard/intel/jarrell/debug.c index 5546421156..b4f2a185b3 100644 --- a/src/mainboard/intel/jarrell/debug.c +++ b/src/mainboard/intel/jarrell/debug.c @@ -12,7 +12,7 @@ static void print_reg(unsigned char index) print_debug_hex8(index); print_debug(": 0x"); print_debug_hex8(data); - print_debug("\r\n"); + print_debug("\n"); return; } @@ -49,52 +49,52 @@ static void siodump(void) int i; unsigned char data; - print_debug("\r\n*** SERVER I/O REGISTERS ***\r\n"); + print_debug("\n*** SERVER I/O REGISTERS ***\n"); for (i=0x10; i<=0x2d; i++) { print_reg((unsigned char)i); } #if 0 - print_debug("\r\n*** XBUS REGISTERS ***\r\n"); + print_debug("\n*** XBUS REGISTERS ***\n"); setup_func(0x0f); for (i=0xf0; i<=0xff; i++) { print_reg((unsigned char)i); } - print_debug("\r\n*** SERIAL 1 CONFIG REGISTERS ***\r\n"); + print_debug("\n*** SERIAL 1 CONFIG REGISTERS ***\n"); setup_func(0x03); print_reg(0xf0); - print_debug("\r\n*** SERIAL 2 CONFIG REGISTERS ***\r\n"); + print_debug("\n*** SERIAL 2 CONFIG REGISTERS ***\n"); setup_func(0x02); print_reg(0xf0); #endif - print_debug("\r\n*** GPIO REGISTERS ***\r\n"); + print_debug("\n*** GPIO REGISTERS ***\n"); setup_func(0x07); for (i=0xf0; i<=0xf8; i++) { print_reg((unsigned char)i); } - print_debug("\r\n*** GPIO VALUES ***\r\n"); + print_debug("\n*** GPIO VALUES ***\n"); data = inb(0x68a); - print_debug("\r\nGPDO 4: 0x"); + print_debug("\nGPDO 4: 0x"); print_debug_hex8(data); data = inb(0x68b); - print_debug("\r\nGPDI 4: 0x"); + print_debug("\nGPDI 4: 0x"); print_debug_hex8(data); - print_debug("\r\n"); + print_debug("\n"); #if 0 - print_debug("\r\n*** WATCHDOG TIMER REGISTERS ***\r\n"); + print_debug("\n*** WATCHDOG TIMER REGISTERS ***\n"); setup_func(0x0a); print_reg(0xf0); - print_debug("\r\n*** FAN CONTROL REGISTERS ***\r\n"); + print_debug("\n*** FAN CONTROL REGISTERS ***\n"); setup_func(0x09); print_reg(0xf0); print_reg(0xf1); - print_debug("\r\n*** RTC REGISTERS ***\r\n"); + print_debug("\n*** RTC REGISTERS ***\n"); setup_func(0x10); print_reg(0xf0); print_reg(0xf1); @@ -104,7 +104,7 @@ static void siodump(void) print_reg(0xfe); print_reg(0xff); - print_debug("\r\n*** HEALTH MONITORING & CONTROL REGISTERS ***\r\n"); + print_debug("\n*** HEALTH MONITORING & CONTROL REGISTERS ***\n"); setup_func(0x14); print_reg(0xf0); #endif @@ -135,7 +135,7 @@ static void print_pci_devices(void) continue; } print_debug_pci_dev(dev); - print_debug("\r\n"); + print_debug("\n"); } } @@ -143,7 +143,7 @@ static void dump_pci_device(unsigned dev) { int i; print_debug_pci_dev(dev); - print_debug("\r\n"); + print_debug("\n"); for(i = 0; i <= 255; i++) { unsigned char val; @@ -155,7 +155,7 @@ static void dump_pci_device(unsigned dev) print_debug_char(' '); print_debug_hex8(val); if ((i & 0x0f) == 0x0f) { - print_debug("\r\n"); + print_debug("\n"); } } } @@ -165,7 +165,7 @@ static void dump_bar14(unsigned dev) int i; unsigned long bar; - print_debug("BAR 14 Dump\r\n"); + print_debug("BAR 14 Dump\n"); bar = pci_read_config32(dev, 0x14); for(i = 0; i <= 0x300; i+=4) { @@ -178,14 +178,14 @@ static void dump_bar14(unsigned dev) val = pci_read_config8(dev, i); #endif if((i%4)==0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex16(i); print_debug_char(' '); } print_debug_hex32(read32(bar + i)); print_debug_char(' '); } - print_debug("\r\n"); + print_debug("\n"); } static void dump_pci_devices(void) @@ -209,7 +209,7 @@ static void dump_pci_devices(void) static void dump_spd_registers(const struct mem_controller *ctrl) { int i; - print_debug("\r\n"); + print_debug("\n"); for(i = 0; i < 4; i++) { unsigned device; device = ctrl->channel0[i]; @@ -223,20 +223,20 @@ static void dump_spd_registers(const struct mem_controller *ctrl) int status; unsigned char byte; if ((j & 0xf) == 0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex8(j); print_debug(": "); } status = smbus_read_byte(device, j); if (status < 0) { - print_debug("bad device\r\n"); + print_debug("bad device\n"); break; } byte = status & 0xff; print_debug_hex8(byte); print_debug_char(' '); } - print_debug("\r\n"); + print_debug("\n"); } device = ctrl->channel1[i]; if (device) { @@ -249,20 +249,20 @@ static void dump_spd_registers(const struct mem_controller *ctrl) int status; unsigned char byte; if ((j & 0xf) == 0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex8(j); print_debug(": "); } status = smbus_read_byte(device, j); if (status < 0) { - print_debug("bad device\r\n"); + print_debug("bad device\n"); break; } byte = status & 0xff; print_debug_hex8(byte); print_debug_char(' '); } - print_debug("\r\n"); + print_debug("\n"); } } } @@ -275,14 +275,14 @@ void dump_spd_registers(void) while(device <= SMBUS_MEM_DEVICE_END) { int status = 0; int i; - print_debug("\r\n"); + print_debug("\n"); print_debug("dimm "); print_debug_hex8(device); for(i = 0; (i < 256) ; i++) { unsigned char byte; if ((i % 16) == 0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex8(i); print_debug(": "); } @@ -290,7 +290,7 @@ void dump_spd_registers(void) if (status < 0) { print_debug("bad device: "); print_debug_hex8(-status); - print_debug("\r\n"); + print_debug("\n"); break; } print_debug_hex8(status); @@ -308,7 +308,7 @@ void dump_ipmi_registers(void) while(device <= 0x42) { int status = 0; int i; - print_debug("\r\n"); + print_debug("\n"); print_debug("ipmi "); print_debug_hex8(device); @@ -318,7 +318,7 @@ void dump_ipmi_registers(void) if (status < 0) { print_debug("bad device: "); print_debug_hex8(-status); - print_debug("\r\n"); + print_debug("\n"); break; } print_debug_hex8(status); diff --git a/src/mainboard/intel/jarrell/jarrell_fixups.c b/src/mainboard/intel/jarrell/jarrell_fixups.c index d8c694b4af..fb00984b7e 100644 --- a/src/mainboard/intel/jarrell/jarrell_fixups.c +++ b/src/mainboard/intel/jarrell/jarrell_fixups.c @@ -58,12 +58,12 @@ static void mainboard_set_e7520_pll(unsigned bits) /* set gpio 42,44 signal levels */ data = inb(gpio_index + PC87427_GPDO_4); if ((data & 0x14) == (0xff & (((bits&2)?0:1)<<4 | ((bits&1)?0:1)<<2))) { - print_debug("set_pllsel: correct settings detected!\r\n"); + print_debug("set_pllsel: correct settings detected!\n"); return; /* settings already configured */ } else { outb((data & 0xeb) | ((bits&2)?0:1)<<4 | ((bits&1)?0:1)<<2, gpio_index + PC87427_GPDO_4); /* reset */ - print_debug("set_pllsel: settings adjusted, now resetting...\r\n"); + print_debug("set_pllsel: settings adjusted, now resetting...\n"); // hard_reset(); /* should activate a PCI_RST, which should reset MCH, but it doesn't seem to work ???? */ // mch_reset(); full_reset(); diff --git a/src/mainboard/intel/jarrell/power_reset_check.c b/src/mainboard/intel/jarrell/power_reset_check.c index e9008a40dc..567d15c10f 100644 --- a/src/mainboard/intel/jarrell/power_reset_check.c +++ b/src/mainboard/intel/jarrell/power_reset_check.c @@ -6,7 +6,7 @@ static void power_down_reset_check(void) cmos=cmos_read(RTC_BOOT_BYTE)>>4 ; print_debug("Boot byte = "); print_debug_hex8(cmos); - print_debug("\r\n"); + print_debug("\n"); if((cmos>2)&&(cmos&1)) full_reset(); } diff --git a/src/mainboard/intel/jarrell/watchdog.c b/src/mainboard/intel/jarrell/watchdog.c index 29e8ba36f6..90782d9fbf 100644 --- a/src/mainboard/intel/jarrell/watchdog.c +++ b/src/mainboard/intel/jarrell/watchdog.c @@ -91,7 +91,7 @@ static void disable_watchdogs(void) disable_sio_watchdog(NSC_WD_DEV); disable_ich5_watchdog(); disable_jarell_frb3(); - print_debug("Watchdogs disabled\r\n"); + print_debug("Watchdogs disabled\n"); } static void ich5_watchdog_on(void) @@ -134,5 +134,5 @@ static void ich5_watchdog_on(void) value &= ~(1 << 11); outw(value, base + 0x08); - print_debug("Watchdog ICH5 enabled\r\n"); + print_debug("Watchdog ICH5 enabled\n"); } diff --git a/src/mainboard/intel/xe7501devkit/romstage.c b/src/mainboard/intel/xe7501devkit/romstage.c index 685f3b8700..4c57de1d75 100644 --- a/src/mainboard/intel/xe7501devkit/romstage.c +++ b/src/mainboard/intel/xe7501devkit/romstage.c @@ -86,6 +86,6 @@ static void main(unsigned long bist) // NOTE: ROMCC dies with an internal compiler error // if the following line is removed. - print_debug("SDRAM is up.\r\n"); + print_debug("SDRAM is up.\n"); } diff --git a/src/mainboard/iwill/dk8_htx/romstage.c b/src/mainboard/iwill/dk8_htx/romstage.c index fec1020dba..da0cc57af7 100644 --- a/src/mainboard/iwill/dk8_htx/romstage.c +++ b/src/mainboard/iwill/dk8_htx/romstage.c @@ -167,7 +167,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) setup_mb_resource_map(); - print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\r\n"); + print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n"); #if CONFIG_MEM_TRAIN_SEQ == 1 set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram @@ -193,7 +193,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { msr_t msr; msr=rdmsr(0xc0010042); - print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); + print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); } @@ -207,7 +207,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { msr_t msr; msr=rdmsr(0xc0010042); - print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); + print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); } #endif @@ -217,7 +217,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) // fidvid change will issue one LDTSTOP and the HT change will be effective too if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset_x(sysinfo->sbbusn, sysinfo->sbdn); } diff --git a/src/mainboard/iwill/dk8s2/romstage.c b/src/mainboard/iwill/dk8s2/romstage.c index 3ceef39900..537d987f6a 100644 --- a/src/mainboard/iwill/dk8s2/romstage.c +++ b/src/mainboard/iwill/dk8s2/romstage.c @@ -167,7 +167,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) setup_default_resource_map(); - print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\r\n"); + print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n"); #if CONFIG_MEM_TRAIN_SEQ == 1 set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram @@ -193,7 +193,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { msr_t msr; msr=rdmsr(0xc0010042); - print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); + print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); } @@ -207,7 +207,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { msr_t msr; msr=rdmsr(0xc0010042); - print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); + print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); } #endif @@ -217,7 +217,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) // fidvid change will issue one LDTSTOP and the HT change will be effective too if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset_x(sysinfo->sbbusn, sysinfo->sbdn); } diff --git a/src/mainboard/iwill/dk8x/romstage.c b/src/mainboard/iwill/dk8x/romstage.c index 3ceef39900..537d987f6a 100644 --- a/src/mainboard/iwill/dk8x/romstage.c +++ b/src/mainboard/iwill/dk8x/romstage.c @@ -167,7 +167,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) setup_default_resource_map(); - print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\r\n"); + print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n"); #if CONFIG_MEM_TRAIN_SEQ == 1 set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram @@ -193,7 +193,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { msr_t msr; msr=rdmsr(0xc0010042); - print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); + print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); } @@ -207,7 +207,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { msr_t msr; msr=rdmsr(0xc0010042); - print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); + print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); } #endif @@ -217,7 +217,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) // fidvid change will issue one LDTSTOP and the HT change will be effective too if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset_x(sysinfo->sbbusn, sysinfo->sbdn); } diff --git a/src/mainboard/jetway/j7f24/romstage.c b/src/mainboard/jetway/j7f24/romstage.c index 4de5aa72ab..a0ad339cd9 100644 --- a/src/mainboard/jetway/j7f24/romstage.c +++ b/src/mainboard/jetway/j7f24/romstage.c @@ -103,26 +103,26 @@ static void main(unsigned long bist) uart_init(); console_init(); - print_spew("In romstage.c:main()\r\n"); + print_spew("In romstage.c:main()\n"); enable_smbus(); smbus_fixup(&ctrl); if (bist == 0) { - print_debug("doing early_mtrr\r\n"); + print_debug("doing early_mtrr\n"); early_mtrr_init(); } /* Halt if there was a built-in self test failure. */ report_bist_failure(bist); - print_debug("Enabling mainboard devices\r\n"); + print_debug("Enabling mainboard devices\n"); enable_mainboard_devices(); ddr_ram_setup(&ctrl); /* ram_check(0, 640 * 1024); */ - print_spew("Leaving romstage.c:main()\r\n"); + print_spew("Leaving romstage.c:main()\n"); } diff --git a/src/mainboard/kontron/kt690/romstage.c b/src/mainboard/kontron/kt690/romstage.c index 200f7567bc..753488933e 100644 --- a/src/mainboard/kontron/kt690/romstage.c +++ b/src/mainboard/kontron/kt690/romstage.c @@ -180,7 +180,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) printk(BIOS_DEBUG, "needs_reset=0x%x\n", needs_reset); if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/lippert/frontrunner/romstage.c b/src/mainboard/lippert/frontrunner/romstage.c index bc097e385d..4c3f615da0 100644 --- a/src/mainboard/lippert/frontrunner/romstage.c +++ b/src/mainboard/lippert/frontrunner/romstage.c @@ -24,7 +24,7 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl) msr_t msr; /* 1. Initialize GLMC registers base on SPD values, * Hard coded as XpressROM for now */ - //print_debug("sdram_enable step 1\r\n"); + //print_debug("sdram_enable step 1\n"); msr = rdmsr(0x20000018); msr.hi = 0x10076013; msr.lo = 0x3400; diff --git a/src/mainboard/lippert/spacerunner-lx/romstage.c b/src/mainboard/lippert/spacerunner-lx/romstage.c index 7a73a1b402..344e0eed84 100644 --- a/src/mainboard/lippert/spacerunner-lx/romstage.c +++ b/src/mainboard/lippert/spacerunner-lx/romstage.c @@ -91,7 +91,7 @@ static inline int spd_read_byte(unsigned int device, unsigned int address) if (address >= sizeof(spdbytes) || spdbytes[address] == 0xFF) { print_err("ERROR: spd_read_byte(DIMM0, 0x"); print_err_hex8(address); - print_err(") returns 0xff\r\n"); + print_err(") returns 0xff\n"); } #endif @@ -222,7 +222,7 @@ void cache_as_ram_main(void) if ((err = smc_send_config(SMC_CONFIG))) { print_err("ERROR "); print_err_char('0'+err); - print_err(" sending config data to SMC\r\n"); + print_err(" sending config data to SMC\n"); } sdram_initialize(1, memctrl); diff --git a/src/mainboard/msi/ms7135/romstage.c b/src/mainboard/msi/ms7135/romstage.c index 2a6c6f368b..ac5487f92c 100644 --- a/src/mainboard/msi/ms7135/romstage.c +++ b/src/mainboard/msi/ms7135/romstage.c @@ -169,7 +169,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) needs_reset |= ck804_early_setup_x(); if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/msi/ms7260/ap_romstage.c b/src/mainboard/msi/ms7260/ap_romstage.c index f8ac2fec3a..246d7afc64 100644 --- a/src/mainboard/msi/ms7260/ap_romstage.c +++ b/src/mainboard/msi/ms7260/ap_romstage.c @@ -72,7 +72,7 @@ void hardwaremain(int ret_addr) */ print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); - print_debug("\r\n"); + print_debug("\n"); train_ram(id.nodeid, sysinfo, sysinfox); diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c index 7e97a27e53..846091a969 100644 --- a/src/mainboard/msi/ms7260/romstage.c +++ b/src/mainboard/msi/ms7260/romstage.c @@ -190,7 +190,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1); print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); - print_debug("\r\n"); + print_debug("\n"); #if CONFIG_MEM_TRAIN_SEQ == 1 /* In BSP so could hold all AP until sysinfo is in RAM. */ @@ -220,7 +220,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) print_debug("begin msr fid, vid "); print_debug_hex32(msr.hi); print_debug_hex32(msr.lo); - print_debug("\r\n"); + print_debug("\n"); } enable_fid_change(); @@ -232,7 +232,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) print_debug("end msr fid, vid "); print_debug_hex32(msr.hi); print_debug_hex32(msr.lo); - print_debug("\r\n"); + print_debug("\n"); } #endif @@ -242,7 +242,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* fidvid change will issue one LDTSTOP and the HT change will be effective too. */ if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } allow_all_aps_stop(bsp_apicid); diff --git a/src/mainboard/msi/ms9185/romstage.c b/src/mainboard/msi/ms9185/romstage.c index 350980e5d2..ecc95d5d67 100644 --- a/src/mainboard/msi/ms9185/romstage.c +++ b/src/mainboard/msi/ms9185/romstage.c @@ -204,7 +204,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) dump_pci_device(PCI_DEV(0, 0x19, 0)); #endif - print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\r\n"); + print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n"); setup_coherent_ht_domain(); @@ -235,7 +235,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { msr_t msr; msr=rdmsr(0xc0010042); - print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); + print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); } @@ -249,7 +249,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { msr_t msr; msr=rdmsr(0xc0010042); - print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); + print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); } #endif @@ -260,7 +260,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) // fidvid change will issue one LDTSTOP and the HT change will be effective too if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } #endif diff --git a/src/mainboard/msi/ms9282/romstage.c b/src/mainboard/msi/ms9282/romstage.c index 24a307eff6..9e6f973c93 100644 --- a/src/mainboard/msi/ms9282/romstage.c +++ b/src/mainboard/msi/ms9282/romstage.c @@ -214,7 +214,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) needs_reset |= mcp55_early_setup_x(); if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/newisys/khepri/romstage.c b/src/mainboard/newisys/khepri/romstage.c index f6d2e54dc6..0174b7b567 100644 --- a/src/mainboard/newisys/khepri/romstage.c +++ b/src/mainboard/newisys/khepri/romstage.c @@ -168,7 +168,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) needs_reset |= ht_setup_chains_x(); if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/nvidia/l1_2pvv/ap_romstage.c b/src/mainboard/nvidia/l1_2pvv/ap_romstage.c index 0935df23ad..cad5252c77 100644 --- a/src/mainboard/nvidia/l1_2pvv/ap_romstage.c +++ b/src/mainboard/nvidia/l1_2pvv/ap_romstage.c @@ -82,7 +82,7 @@ void hardwaremain(int ret_addr) id = get_node_core_id_x(); //FIXME: for USBDEBUG_DIRECT you need to make sure dbg_info get assigned in AP - print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\r\n"); + print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n"); train_ram(id.nodeid, sysinfo, sysinfox); diff --git a/src/mainboard/nvidia/l1_2pvv/romstage.c b/src/mainboard/nvidia/l1_2pvv/romstage.c index cf4501f460..3176c38e22 100644 --- a/src/mainboard/nvidia/l1_2pvv/romstage.c +++ b/src/mainboard/nvidia/l1_2pvv/romstage.c @@ -215,7 +215,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) console_init(); printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1); - print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\r\n"); + print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n"); #if CONFIG_MEM_TRAIN_SEQ == 1 set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram @@ -241,7 +241,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { msr_t msr; msr=rdmsr(0xc0010042); - print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); + print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); } @@ -255,7 +255,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { msr_t msr; msr=rdmsr(0xc0010042); - print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); + print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); } #endif @@ -266,7 +266,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) // fidvid change will issue one LDTSTOP and the HT change will be effective too if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } allow_all_aps_stop(bsp_apicid); diff --git a/src/mainboard/olpc/btest/romstage.c b/src/mainboard/olpc/btest/romstage.c index b13700da44..1503baa6ba 100644 --- a/src/mainboard/olpc/btest/romstage.c +++ b/src/mainboard/olpc/btest/romstage.c @@ -90,7 +90,7 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl) print_debug("computed msr.hi "); print_debug_hex32(msr.hi); - print_debug("\r\n"); + print_debug("\n"); /* this is a standard value, DOES NOT PROBABLY MATCH FROM ABOVE */ /* well, it may be close. It's about 200,000 ticks */ diff --git a/src/mainboard/olpc/rev_a/romstage.c b/src/mainboard/olpc/rev_a/romstage.c index b13700da44..1503baa6ba 100644 --- a/src/mainboard/olpc/rev_a/romstage.c +++ b/src/mainboard/olpc/rev_a/romstage.c @@ -90,7 +90,7 @@ static void sdram_set_spd_registers(const struct mem_controller *ctrl) print_debug("computed msr.hi "); print_debug_hex32(msr.hi); - print_debug("\r\n"); + print_debug("\n"); /* this is a standard value, DOES NOT PROBABLY MATCH FROM ABOVE */ /* well, it may be close. It's about 200,000 ticks */ diff --git a/src/mainboard/pcengines/alix1c/romstage.c b/src/mainboard/pcengines/alix1c/romstage.c index 07f11ff647..236e530258 100644 --- a/src/mainboard/pcengines/alix1c/romstage.c +++ b/src/mainboard/pcengines/alix1c/romstage.c @@ -98,7 +98,7 @@ static u8 spd_read_byte(u8 device, u8 address) print_debug_hex8(address); print_debug(" returns "); print_debug_hex8(spdbytes[address]); - print_debug("\r\n"); + print_debug("\n"); return spdbytes[address]; } diff --git a/src/mainboard/sunw/ultra40/romstage.c b/src/mainboard/sunw/ultra40/romstage.c index 84e29b8e9f..c76f802f58 100644 --- a/src/mainboard/sunw/ultra40/romstage.c +++ b/src/mainboard/sunw/ultra40/romstage.c @@ -193,7 +193,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) needs_reset |= ck804_early_setup_x(); if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/supermicro/h8dme/ap_romstage.c b/src/mainboard/supermicro/h8dme/ap_romstage.c index 05c62c3e2c..60dd1b275e 100644 --- a/src/mainboard/supermicro/h8dme/ap_romstage.c +++ b/src/mainboard/supermicro/h8dme/ap_romstage.c @@ -86,7 +86,7 @@ void hardwaremain(int ret_addr) id = get_node_core_id_x(); - print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\r\n"); + print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n"); train_ram(id.nodeid, sysinfo, sysinfox); diff --git a/src/mainboard/supermicro/h8dme/romstage.c b/src/mainboard/supermicro/h8dme/romstage.c index 2edf58c39d..7f668f4c15 100644 --- a/src/mainboard/supermicro/h8dme/romstage.c +++ b/src/mainboard/supermicro/h8dme/romstage.c @@ -94,7 +94,7 @@ static void dump_smbus_registers(void) { u32 device; - print_debug("\r\n"); + print_debug("\n"); for (device = 1; device < 0x80; device++) { int j; if (smbus_read_byte(device, 0) < 0) @@ -108,12 +108,12 @@ static void dump_smbus_registers(void) break; } if ((j & 0xf) == 0) { - printk(BIOS_DEBUG, "\r\n%02x: ", j); + printk(BIOS_DEBUG, "\n%02x: ", j); } byte = status & 0xff; printk(BIOS_DEBUG, "%02x ", byte); } - print_debug("\r\n"); + print_debug("\n"); } } @@ -137,13 +137,13 @@ static inline void change_i2c_mux(unsigned device) smbus_send_byte(SMBUS_SWITCH1, device & 0x0f); smbus_send_byte_one(SMBUS_SWITCH2, (device >> 4) & 0x0f); int ret; - print_debug("change_i2c_mux i="); print_debug_hex8(device); print_debug("\r\n"); + print_debug("change_i2c_mux i="); print_debug_hex8(device); print_debug("\n"); dump_smbus_registers(); ret = smbus_send_byte(SMBUS_SWITCH1, device); - print_debug("change_i2c_mux ret="); print_debug_hex32(ret); print_debug("\r\n"); + print_debug("change_i2c_mux ret="); print_debug_hex32(ret); print_debug("\n"); dump_smbus_registers(); ret = smbus_send_byte_one(SMBUS_SWITCH2, device); - print_debug("change_i2c_mux ret="); print_debug_hex32(ret); print_debug("\r\n"); + print_debug("change_i2c_mux ret="); print_debug_hex32(ret); print_debug("\n"); dump_smbus_registers(); } */ @@ -273,7 +273,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); - print_debug("\r\n"); + print_debug("\n"); #if CONFIG_MEM_TRAIN_SEQ == 1 set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram @@ -303,7 +303,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) print_debug("begin msr fid, vid "); print_debug_hex32(msr.hi); print_debug_hex32(msr.lo); - print_debug("\r\n"); + print_debug("\n"); } @@ -320,7 +320,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) print_debug("end msr fid, vid "); print_debug_hex32(msr.hi); print_debug_hex32(msr.lo); - print_debug("\r\n"); + print_debug("\n"); } #endif @@ -332,7 +332,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) // fidvid change will issue one LDTSTOP and the HT change will be effective too if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } #endif diff --git a/src/mainboard/supermicro/h8dmr/ap_romstage.c b/src/mainboard/supermicro/h8dmr/ap_romstage.c index 05c62c3e2c..60dd1b275e 100644 --- a/src/mainboard/supermicro/h8dmr/ap_romstage.c +++ b/src/mainboard/supermicro/h8dmr/ap_romstage.c @@ -86,7 +86,7 @@ void hardwaremain(int ret_addr) id = get_node_core_id_x(); - print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\r\n"); + print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n"); train_ram(id.nodeid, sysinfo, sysinfox); diff --git a/src/mainboard/supermicro/h8dmr/romstage.c b/src/mainboard/supermicro/h8dmr/romstage.c index a56f799c7a..7245b37fb2 100644 --- a/src/mainboard/supermicro/h8dmr/romstage.c +++ b/src/mainboard/supermicro/h8dmr/romstage.c @@ -202,7 +202,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) setup_mb_resource_map(); - print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\r\n"); + print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n"); #if CONFIG_MEM_TRAIN_SEQ == 1 set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram @@ -228,7 +228,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { msr_t msr; msr=rdmsr(0xc0010042); - print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); + print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); } @@ -242,7 +242,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { msr_t msr; msr=rdmsr(0xc0010042); - print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); + print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); } #endif @@ -254,7 +254,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) // fidvid change will issue one LDTSTOP and the HT change will be effective too if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } #endif diff --git a/src/mainboard/supermicro/x6dai_g/debug.c b/src/mainboard/supermicro/x6dai_g/debug.c index 5546421156..b4f2a185b3 100644 --- a/src/mainboard/supermicro/x6dai_g/debug.c +++ b/src/mainboard/supermicro/x6dai_g/debug.c @@ -12,7 +12,7 @@ static void print_reg(unsigned char index) print_debug_hex8(index); print_debug(": 0x"); print_debug_hex8(data); - print_debug("\r\n"); + print_debug("\n"); return; } @@ -49,52 +49,52 @@ static void siodump(void) int i; unsigned char data; - print_debug("\r\n*** SERVER I/O REGISTERS ***\r\n"); + print_debug("\n*** SERVER I/O REGISTERS ***\n"); for (i=0x10; i<=0x2d; i++) { print_reg((unsigned char)i); } #if 0 - print_debug("\r\n*** XBUS REGISTERS ***\r\n"); + print_debug("\n*** XBUS REGISTERS ***\n"); setup_func(0x0f); for (i=0xf0; i<=0xff; i++) { print_reg((unsigned char)i); } - print_debug("\r\n*** SERIAL 1 CONFIG REGISTERS ***\r\n"); + print_debug("\n*** SERIAL 1 CONFIG REGISTERS ***\n"); setup_func(0x03); print_reg(0xf0); - print_debug("\r\n*** SERIAL 2 CONFIG REGISTERS ***\r\n"); + print_debug("\n*** SERIAL 2 CONFIG REGISTERS ***\n"); setup_func(0x02); print_reg(0xf0); #endif - print_debug("\r\n*** GPIO REGISTERS ***\r\n"); + print_debug("\n*** GPIO REGISTERS ***\n"); setup_func(0x07); for (i=0xf0; i<=0xf8; i++) { print_reg((unsigned char)i); } - print_debug("\r\n*** GPIO VALUES ***\r\n"); + print_debug("\n*** GPIO VALUES ***\n"); data = inb(0x68a); - print_debug("\r\nGPDO 4: 0x"); + print_debug("\nGPDO 4: 0x"); print_debug_hex8(data); data = inb(0x68b); - print_debug("\r\nGPDI 4: 0x"); + print_debug("\nGPDI 4: 0x"); print_debug_hex8(data); - print_debug("\r\n"); + print_debug("\n"); #if 0 - print_debug("\r\n*** WATCHDOG TIMER REGISTERS ***\r\n"); + print_debug("\n*** WATCHDOG TIMER REGISTERS ***\n"); setup_func(0x0a); print_reg(0xf0); - print_debug("\r\n*** FAN CONTROL REGISTERS ***\r\n"); + print_debug("\n*** FAN CONTROL REGISTERS ***\n"); setup_func(0x09); print_reg(0xf0); print_reg(0xf1); - print_debug("\r\n*** RTC REGISTERS ***\r\n"); + print_debug("\n*** RTC REGISTERS ***\n"); setup_func(0x10); print_reg(0xf0); print_reg(0xf1); @@ -104,7 +104,7 @@ static void siodump(void) print_reg(0xfe); print_reg(0xff); - print_debug("\r\n*** HEALTH MONITORING & CONTROL REGISTERS ***\r\n"); + print_debug("\n*** HEALTH MONITORING & CONTROL REGISTERS ***\n"); setup_func(0x14); print_reg(0xf0); #endif @@ -135,7 +135,7 @@ static void print_pci_devices(void) continue; } print_debug_pci_dev(dev); - print_debug("\r\n"); + print_debug("\n"); } } @@ -143,7 +143,7 @@ static void dump_pci_device(unsigned dev) { int i; print_debug_pci_dev(dev); - print_debug("\r\n"); + print_debug("\n"); for(i = 0; i <= 255; i++) { unsigned char val; @@ -155,7 +155,7 @@ static void dump_pci_device(unsigned dev) print_debug_char(' '); print_debug_hex8(val); if ((i & 0x0f) == 0x0f) { - print_debug("\r\n"); + print_debug("\n"); } } } @@ -165,7 +165,7 @@ static void dump_bar14(unsigned dev) int i; unsigned long bar; - print_debug("BAR 14 Dump\r\n"); + print_debug("BAR 14 Dump\n"); bar = pci_read_config32(dev, 0x14); for(i = 0; i <= 0x300; i+=4) { @@ -178,14 +178,14 @@ static void dump_bar14(unsigned dev) val = pci_read_config8(dev, i); #endif if((i%4)==0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex16(i); print_debug_char(' '); } print_debug_hex32(read32(bar + i)); print_debug_char(' '); } - print_debug("\r\n"); + print_debug("\n"); } static void dump_pci_devices(void) @@ -209,7 +209,7 @@ static void dump_pci_devices(void) static void dump_spd_registers(const struct mem_controller *ctrl) { int i; - print_debug("\r\n"); + print_debug("\n"); for(i = 0; i < 4; i++) { unsigned device; device = ctrl->channel0[i]; @@ -223,20 +223,20 @@ static void dump_spd_registers(const struct mem_controller *ctrl) int status; unsigned char byte; if ((j & 0xf) == 0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex8(j); print_debug(": "); } status = smbus_read_byte(device, j); if (status < 0) { - print_debug("bad device\r\n"); + print_debug("bad device\n"); break; } byte = status & 0xff; print_debug_hex8(byte); print_debug_char(' '); } - print_debug("\r\n"); + print_debug("\n"); } device = ctrl->channel1[i]; if (device) { @@ -249,20 +249,20 @@ static void dump_spd_registers(const struct mem_controller *ctrl) int status; unsigned char byte; if ((j & 0xf) == 0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex8(j); print_debug(": "); } status = smbus_read_byte(device, j); if (status < 0) { - print_debug("bad device\r\n"); + print_debug("bad device\n"); break; } byte = status & 0xff; print_debug_hex8(byte); print_debug_char(' '); } - print_debug("\r\n"); + print_debug("\n"); } } } @@ -275,14 +275,14 @@ void dump_spd_registers(void) while(device <= SMBUS_MEM_DEVICE_END) { int status = 0; int i; - print_debug("\r\n"); + print_debug("\n"); print_debug("dimm "); print_debug_hex8(device); for(i = 0; (i < 256) ; i++) { unsigned char byte; if ((i % 16) == 0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex8(i); print_debug(": "); } @@ -290,7 +290,7 @@ void dump_spd_registers(void) if (status < 0) { print_debug("bad device: "); print_debug_hex8(-status); - print_debug("\r\n"); + print_debug("\n"); break; } print_debug_hex8(status); @@ -308,7 +308,7 @@ void dump_ipmi_registers(void) while(device <= 0x42) { int status = 0; int i; - print_debug("\r\n"); + print_debug("\n"); print_debug("ipmi "); print_debug_hex8(device); @@ -318,7 +318,7 @@ void dump_ipmi_registers(void) if (status < 0) { print_debug("bad device: "); print_debug_hex8(-status); - print_debug("\r\n"); + print_debug("\n"); break; } print_debug_hex8(status); diff --git a/src/mainboard/supermicro/x6dai_g/watchdog.c b/src/mainboard/supermicro/x6dai_g/watchdog.c index 465ba4c7b3..2531bc2969 100644 --- a/src/mainboard/supermicro/x6dai_g/watchdog.c +++ b/src/mainboard/supermicro/x6dai_g/watchdog.c @@ -37,6 +37,6 @@ static void disable_esb6300_watchdog(void) static void disable_watchdogs(void) { disable_esb6300_watchdog(); - print_debug("Watchdogs disabled\r\n"); + print_debug("Watchdogs disabled\n"); } diff --git a/src/mainboard/supermicro/x6dhe_g/debug.c b/src/mainboard/supermicro/x6dhe_g/debug.c index 5546421156..b4f2a185b3 100644 --- a/src/mainboard/supermicro/x6dhe_g/debug.c +++ b/src/mainboard/supermicro/x6dhe_g/debug.c @@ -12,7 +12,7 @@ static void print_reg(unsigned char index) print_debug_hex8(index); print_debug(": 0x"); print_debug_hex8(data); - print_debug("\r\n"); + print_debug("\n"); return; } @@ -49,52 +49,52 @@ static void siodump(void) int i; unsigned char data; - print_debug("\r\n*** SERVER I/O REGISTERS ***\r\n"); + print_debug("\n*** SERVER I/O REGISTERS ***\n"); for (i=0x10; i<=0x2d; i++) { print_reg((unsigned char)i); } #if 0 - print_debug("\r\n*** XBUS REGISTERS ***\r\n"); + print_debug("\n*** XBUS REGISTERS ***\n"); setup_func(0x0f); for (i=0xf0; i<=0xff; i++) { print_reg((unsigned char)i); } - print_debug("\r\n*** SERIAL 1 CONFIG REGISTERS ***\r\n"); + print_debug("\n*** SERIAL 1 CONFIG REGISTERS ***\n"); setup_func(0x03); print_reg(0xf0); - print_debug("\r\n*** SERIAL 2 CONFIG REGISTERS ***\r\n"); + print_debug("\n*** SERIAL 2 CONFIG REGISTERS ***\n"); setup_func(0x02); print_reg(0xf0); #endif - print_debug("\r\n*** GPIO REGISTERS ***\r\n"); + print_debug("\n*** GPIO REGISTERS ***\n"); setup_func(0x07); for (i=0xf0; i<=0xf8; i++) { print_reg((unsigned char)i); } - print_debug("\r\n*** GPIO VALUES ***\r\n"); + print_debug("\n*** GPIO VALUES ***\n"); data = inb(0x68a); - print_debug("\r\nGPDO 4: 0x"); + print_debug("\nGPDO 4: 0x"); print_debug_hex8(data); data = inb(0x68b); - print_debug("\r\nGPDI 4: 0x"); + print_debug("\nGPDI 4: 0x"); print_debug_hex8(data); - print_debug("\r\n"); + print_debug("\n"); #if 0 - print_debug("\r\n*** WATCHDOG TIMER REGISTERS ***\r\n"); + print_debug("\n*** WATCHDOG TIMER REGISTERS ***\n"); setup_func(0x0a); print_reg(0xf0); - print_debug("\r\n*** FAN CONTROL REGISTERS ***\r\n"); + print_debug("\n*** FAN CONTROL REGISTERS ***\n"); setup_func(0x09); print_reg(0xf0); print_reg(0xf1); - print_debug("\r\n*** RTC REGISTERS ***\r\n"); + print_debug("\n*** RTC REGISTERS ***\n"); setup_func(0x10); print_reg(0xf0); print_reg(0xf1); @@ -104,7 +104,7 @@ static void siodump(void) print_reg(0xfe); print_reg(0xff); - print_debug("\r\n*** HEALTH MONITORING & CONTROL REGISTERS ***\r\n"); + print_debug("\n*** HEALTH MONITORING & CONTROL REGISTERS ***\n"); setup_func(0x14); print_reg(0xf0); #endif @@ -135,7 +135,7 @@ static void print_pci_devices(void) continue; } print_debug_pci_dev(dev); - print_debug("\r\n"); + print_debug("\n"); } } @@ -143,7 +143,7 @@ static void dump_pci_device(unsigned dev) { int i; print_debug_pci_dev(dev); - print_debug("\r\n"); + print_debug("\n"); for(i = 0; i <= 255; i++) { unsigned char val; @@ -155,7 +155,7 @@ static void dump_pci_device(unsigned dev) print_debug_char(' '); print_debug_hex8(val); if ((i & 0x0f) == 0x0f) { - print_debug("\r\n"); + print_debug("\n"); } } } @@ -165,7 +165,7 @@ static void dump_bar14(unsigned dev) int i; unsigned long bar; - print_debug("BAR 14 Dump\r\n"); + print_debug("BAR 14 Dump\n"); bar = pci_read_config32(dev, 0x14); for(i = 0; i <= 0x300; i+=4) { @@ -178,14 +178,14 @@ static void dump_bar14(unsigned dev) val = pci_read_config8(dev, i); #endif if((i%4)==0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex16(i); print_debug_char(' '); } print_debug_hex32(read32(bar + i)); print_debug_char(' '); } - print_debug("\r\n"); + print_debug("\n"); } static void dump_pci_devices(void) @@ -209,7 +209,7 @@ static void dump_pci_devices(void) static void dump_spd_registers(const struct mem_controller *ctrl) { int i; - print_debug("\r\n"); + print_debug("\n"); for(i = 0; i < 4; i++) { unsigned device; device = ctrl->channel0[i]; @@ -223,20 +223,20 @@ static void dump_spd_registers(const struct mem_controller *ctrl) int status; unsigned char byte; if ((j & 0xf) == 0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex8(j); print_debug(": "); } status = smbus_read_byte(device, j); if (status < 0) { - print_debug("bad device\r\n"); + print_debug("bad device\n"); break; } byte = status & 0xff; print_debug_hex8(byte); print_debug_char(' '); } - print_debug("\r\n"); + print_debug("\n"); } device = ctrl->channel1[i]; if (device) { @@ -249,20 +249,20 @@ static void dump_spd_registers(const struct mem_controller *ctrl) int status; unsigned char byte; if ((j & 0xf) == 0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex8(j); print_debug(": "); } status = smbus_read_byte(device, j); if (status < 0) { - print_debug("bad device\r\n"); + print_debug("bad device\n"); break; } byte = status & 0xff; print_debug_hex8(byte); print_debug_char(' '); } - print_debug("\r\n"); + print_debug("\n"); } } } @@ -275,14 +275,14 @@ void dump_spd_registers(void) while(device <= SMBUS_MEM_DEVICE_END) { int status = 0; int i; - print_debug("\r\n"); + print_debug("\n"); print_debug("dimm "); print_debug_hex8(device); for(i = 0; (i < 256) ; i++) { unsigned char byte; if ((i % 16) == 0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex8(i); print_debug(": "); } @@ -290,7 +290,7 @@ void dump_spd_registers(void) if (status < 0) { print_debug("bad device: "); print_debug_hex8(-status); - print_debug("\r\n"); + print_debug("\n"); break; } print_debug_hex8(status); @@ -308,7 +308,7 @@ void dump_ipmi_registers(void) while(device <= 0x42) { int status = 0; int i; - print_debug("\r\n"); + print_debug("\n"); print_debug("ipmi "); print_debug_hex8(device); @@ -318,7 +318,7 @@ void dump_ipmi_registers(void) if (status < 0) { print_debug("bad device: "); print_debug_hex8(-status); - print_debug("\r\n"); + print_debug("\n"); break; } print_debug_hex8(status); diff --git a/src/mainboard/supermicro/x6dhe_g/watchdog.c b/src/mainboard/supermicro/x6dhe_g/watchdog.c index 3904a7dc94..17ec9621ad 100644 --- a/src/mainboard/supermicro/x6dhe_g/watchdog.c +++ b/src/mainboard/supermicro/x6dhe_g/watchdog.c @@ -94,6 +94,6 @@ static void disable_watchdogs(void) // disable_sio_watchdog(NSC_WD_DEV); disable_esb6300_watchdog(); // disable_jarell_frb3(); - print_debug("Watchdogs disabled\r\n"); + print_debug("Watchdogs disabled\n"); } diff --git a/src/mainboard/supermicro/x6dhe_g2/debug.c b/src/mainboard/supermicro/x6dhe_g2/debug.c index 5546421156..b4f2a185b3 100644 --- a/src/mainboard/supermicro/x6dhe_g2/debug.c +++ b/src/mainboard/supermicro/x6dhe_g2/debug.c @@ -12,7 +12,7 @@ static void print_reg(unsigned char index) print_debug_hex8(index); print_debug(": 0x"); print_debug_hex8(data); - print_debug("\r\n"); + print_debug("\n"); return; } @@ -49,52 +49,52 @@ static void siodump(void) int i; unsigned char data; - print_debug("\r\n*** SERVER I/O REGISTERS ***\r\n"); + print_debug("\n*** SERVER I/O REGISTERS ***\n"); for (i=0x10; i<=0x2d; i++) { print_reg((unsigned char)i); } #if 0 - print_debug("\r\n*** XBUS REGISTERS ***\r\n"); + print_debug("\n*** XBUS REGISTERS ***\n"); setup_func(0x0f); for (i=0xf0; i<=0xff; i++) { print_reg((unsigned char)i); } - print_debug("\r\n*** SERIAL 1 CONFIG REGISTERS ***\r\n"); + print_debug("\n*** SERIAL 1 CONFIG REGISTERS ***\n"); setup_func(0x03); print_reg(0xf0); - print_debug("\r\n*** SERIAL 2 CONFIG REGISTERS ***\r\n"); + print_debug("\n*** SERIAL 2 CONFIG REGISTERS ***\n"); setup_func(0x02); print_reg(0xf0); #endif - print_debug("\r\n*** GPIO REGISTERS ***\r\n"); + print_debug("\n*** GPIO REGISTERS ***\n"); setup_func(0x07); for (i=0xf0; i<=0xf8; i++) { print_reg((unsigned char)i); } - print_debug("\r\n*** GPIO VALUES ***\r\n"); + print_debug("\n*** GPIO VALUES ***\n"); data = inb(0x68a); - print_debug("\r\nGPDO 4: 0x"); + print_debug("\nGPDO 4: 0x"); print_debug_hex8(data); data = inb(0x68b); - print_debug("\r\nGPDI 4: 0x"); + print_debug("\nGPDI 4: 0x"); print_debug_hex8(data); - print_debug("\r\n"); + print_debug("\n"); #if 0 - print_debug("\r\n*** WATCHDOG TIMER REGISTERS ***\r\n"); + print_debug("\n*** WATCHDOG TIMER REGISTERS ***\n"); setup_func(0x0a); print_reg(0xf0); - print_debug("\r\n*** FAN CONTROL REGISTERS ***\r\n"); + print_debug("\n*** FAN CONTROL REGISTERS ***\n"); setup_func(0x09); print_reg(0xf0); print_reg(0xf1); - print_debug("\r\n*** RTC REGISTERS ***\r\n"); + print_debug("\n*** RTC REGISTERS ***\n"); setup_func(0x10); print_reg(0xf0); print_reg(0xf1); @@ -104,7 +104,7 @@ static void siodump(void) print_reg(0xfe); print_reg(0xff); - print_debug("\r\n*** HEALTH MONITORING & CONTROL REGISTERS ***\r\n"); + print_debug("\n*** HEALTH MONITORING & CONTROL REGISTERS ***\n"); setup_func(0x14); print_reg(0xf0); #endif @@ -135,7 +135,7 @@ static void print_pci_devices(void) continue; } print_debug_pci_dev(dev); - print_debug("\r\n"); + print_debug("\n"); } } @@ -143,7 +143,7 @@ static void dump_pci_device(unsigned dev) { int i; print_debug_pci_dev(dev); - print_debug("\r\n"); + print_debug("\n"); for(i = 0; i <= 255; i++) { unsigned char val; @@ -155,7 +155,7 @@ static void dump_pci_device(unsigned dev) print_debug_char(' '); print_debug_hex8(val); if ((i & 0x0f) == 0x0f) { - print_debug("\r\n"); + print_debug("\n"); } } } @@ -165,7 +165,7 @@ static void dump_bar14(unsigned dev) int i; unsigned long bar; - print_debug("BAR 14 Dump\r\n"); + print_debug("BAR 14 Dump\n"); bar = pci_read_config32(dev, 0x14); for(i = 0; i <= 0x300; i+=4) { @@ -178,14 +178,14 @@ static void dump_bar14(unsigned dev) val = pci_read_config8(dev, i); #endif if((i%4)==0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex16(i); print_debug_char(' '); } print_debug_hex32(read32(bar + i)); print_debug_char(' '); } - print_debug("\r\n"); + print_debug("\n"); } static void dump_pci_devices(void) @@ -209,7 +209,7 @@ static void dump_pci_devices(void) static void dump_spd_registers(const struct mem_controller *ctrl) { int i; - print_debug("\r\n"); + print_debug("\n"); for(i = 0; i < 4; i++) { unsigned device; device = ctrl->channel0[i]; @@ -223,20 +223,20 @@ static void dump_spd_registers(const struct mem_controller *ctrl) int status; unsigned char byte; if ((j & 0xf) == 0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex8(j); print_debug(": "); } status = smbus_read_byte(device, j); if (status < 0) { - print_debug("bad device\r\n"); + print_debug("bad device\n"); break; } byte = status & 0xff; print_debug_hex8(byte); print_debug_char(' '); } - print_debug("\r\n"); + print_debug("\n"); } device = ctrl->channel1[i]; if (device) { @@ -249,20 +249,20 @@ static void dump_spd_registers(const struct mem_controller *ctrl) int status; unsigned char byte; if ((j & 0xf) == 0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex8(j); print_debug(": "); } status = smbus_read_byte(device, j); if (status < 0) { - print_debug("bad device\r\n"); + print_debug("bad device\n"); break; } byte = status & 0xff; print_debug_hex8(byte); print_debug_char(' '); } - print_debug("\r\n"); + print_debug("\n"); } } } @@ -275,14 +275,14 @@ void dump_spd_registers(void) while(device <= SMBUS_MEM_DEVICE_END) { int status = 0; int i; - print_debug("\r\n"); + print_debug("\n"); print_debug("dimm "); print_debug_hex8(device); for(i = 0; (i < 256) ; i++) { unsigned char byte; if ((i % 16) == 0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex8(i); print_debug(": "); } @@ -290,7 +290,7 @@ void dump_spd_registers(void) if (status < 0) { print_debug("bad device: "); print_debug_hex8(-status); - print_debug("\r\n"); + print_debug("\n"); break; } print_debug_hex8(status); @@ -308,7 +308,7 @@ void dump_ipmi_registers(void) while(device <= 0x42) { int status = 0; int i; - print_debug("\r\n"); + print_debug("\n"); print_debug("ipmi "); print_debug_hex8(device); @@ -318,7 +318,7 @@ void dump_ipmi_registers(void) if (status < 0) { print_debug("bad device: "); print_debug_hex8(-status); - print_debug("\r\n"); + print_debug("\n"); break; } print_debug_hex8(status); diff --git a/src/mainboard/supermicro/x6dhe_g2/watchdog.c b/src/mainboard/supermicro/x6dhe_g2/watchdog.c index 3904a7dc94..17ec9621ad 100644 --- a/src/mainboard/supermicro/x6dhe_g2/watchdog.c +++ b/src/mainboard/supermicro/x6dhe_g2/watchdog.c @@ -94,6 +94,6 @@ static void disable_watchdogs(void) // disable_sio_watchdog(NSC_WD_DEV); disable_esb6300_watchdog(); // disable_jarell_frb3(); - print_debug("Watchdogs disabled\r\n"); + print_debug("Watchdogs disabled\n"); } diff --git a/src/mainboard/supermicro/x6dhr_ig/debug.c b/src/mainboard/supermicro/x6dhr_ig/debug.c index 5546421156..b4f2a185b3 100644 --- a/src/mainboard/supermicro/x6dhr_ig/debug.c +++ b/src/mainboard/supermicro/x6dhr_ig/debug.c @@ -12,7 +12,7 @@ static void print_reg(unsigned char index) print_debug_hex8(index); print_debug(": 0x"); print_debug_hex8(data); - print_debug("\r\n"); + print_debug("\n"); return; } @@ -49,52 +49,52 @@ static void siodump(void) int i; unsigned char data; - print_debug("\r\n*** SERVER I/O REGISTERS ***\r\n"); + print_debug("\n*** SERVER I/O REGISTERS ***\n"); for (i=0x10; i<=0x2d; i++) { print_reg((unsigned char)i); } #if 0 - print_debug("\r\n*** XBUS REGISTERS ***\r\n"); + print_debug("\n*** XBUS REGISTERS ***\n"); setup_func(0x0f); for (i=0xf0; i<=0xff; i++) { print_reg((unsigned char)i); } - print_debug("\r\n*** SERIAL 1 CONFIG REGISTERS ***\r\n"); + print_debug("\n*** SERIAL 1 CONFIG REGISTERS ***\n"); setup_func(0x03); print_reg(0xf0); - print_debug("\r\n*** SERIAL 2 CONFIG REGISTERS ***\r\n"); + print_debug("\n*** SERIAL 2 CONFIG REGISTERS ***\n"); setup_func(0x02); print_reg(0xf0); #endif - print_debug("\r\n*** GPIO REGISTERS ***\r\n"); + print_debug("\n*** GPIO REGISTERS ***\n"); setup_func(0x07); for (i=0xf0; i<=0xf8; i++) { print_reg((unsigned char)i); } - print_debug("\r\n*** GPIO VALUES ***\r\n"); + print_debug("\n*** GPIO VALUES ***\n"); data = inb(0x68a); - print_debug("\r\nGPDO 4: 0x"); + print_debug("\nGPDO 4: 0x"); print_debug_hex8(data); data = inb(0x68b); - print_debug("\r\nGPDI 4: 0x"); + print_debug("\nGPDI 4: 0x"); print_debug_hex8(data); - print_debug("\r\n"); + print_debug("\n"); #if 0 - print_debug("\r\n*** WATCHDOG TIMER REGISTERS ***\r\n"); + print_debug("\n*** WATCHDOG TIMER REGISTERS ***\n"); setup_func(0x0a); print_reg(0xf0); - print_debug("\r\n*** FAN CONTROL REGISTERS ***\r\n"); + print_debug("\n*** FAN CONTROL REGISTERS ***\n"); setup_func(0x09); print_reg(0xf0); print_reg(0xf1); - print_debug("\r\n*** RTC REGISTERS ***\r\n"); + print_debug("\n*** RTC REGISTERS ***\n"); setup_func(0x10); print_reg(0xf0); print_reg(0xf1); @@ -104,7 +104,7 @@ static void siodump(void) print_reg(0xfe); print_reg(0xff); - print_debug("\r\n*** HEALTH MONITORING & CONTROL REGISTERS ***\r\n"); + print_debug("\n*** HEALTH MONITORING & CONTROL REGISTERS ***\n"); setup_func(0x14); print_reg(0xf0); #endif @@ -135,7 +135,7 @@ static void print_pci_devices(void) continue; } print_debug_pci_dev(dev); - print_debug("\r\n"); + print_debug("\n"); } } @@ -143,7 +143,7 @@ static void dump_pci_device(unsigned dev) { int i; print_debug_pci_dev(dev); - print_debug("\r\n"); + print_debug("\n"); for(i = 0; i <= 255; i++) { unsigned char val; @@ -155,7 +155,7 @@ static void dump_pci_device(unsigned dev) print_debug_char(' '); print_debug_hex8(val); if ((i & 0x0f) == 0x0f) { - print_debug("\r\n"); + print_debug("\n"); } } } @@ -165,7 +165,7 @@ static void dump_bar14(unsigned dev) int i; unsigned long bar; - print_debug("BAR 14 Dump\r\n"); + print_debug("BAR 14 Dump\n"); bar = pci_read_config32(dev, 0x14); for(i = 0; i <= 0x300; i+=4) { @@ -178,14 +178,14 @@ static void dump_bar14(unsigned dev) val = pci_read_config8(dev, i); #endif if((i%4)==0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex16(i); print_debug_char(' '); } print_debug_hex32(read32(bar + i)); print_debug_char(' '); } - print_debug("\r\n"); + print_debug("\n"); } static void dump_pci_devices(void) @@ -209,7 +209,7 @@ static void dump_pci_devices(void) static void dump_spd_registers(const struct mem_controller *ctrl) { int i; - print_debug("\r\n"); + print_debug("\n"); for(i = 0; i < 4; i++) { unsigned device; device = ctrl->channel0[i]; @@ -223,20 +223,20 @@ static void dump_spd_registers(const struct mem_controller *ctrl) int status; unsigned char byte; if ((j & 0xf) == 0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex8(j); print_debug(": "); } status = smbus_read_byte(device, j); if (status < 0) { - print_debug("bad device\r\n"); + print_debug("bad device\n"); break; } byte = status & 0xff; print_debug_hex8(byte); print_debug_char(' '); } - print_debug("\r\n"); + print_debug("\n"); } device = ctrl->channel1[i]; if (device) { @@ -249,20 +249,20 @@ static void dump_spd_registers(const struct mem_controller *ctrl) int status; unsigned char byte; if ((j & 0xf) == 0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex8(j); print_debug(": "); } status = smbus_read_byte(device, j); if (status < 0) { - print_debug("bad device\r\n"); + print_debug("bad device\n"); break; } byte = status & 0xff; print_debug_hex8(byte); print_debug_char(' '); } - print_debug("\r\n"); + print_debug("\n"); } } } @@ -275,14 +275,14 @@ void dump_spd_registers(void) while(device <= SMBUS_MEM_DEVICE_END) { int status = 0; int i; - print_debug("\r\n"); + print_debug("\n"); print_debug("dimm "); print_debug_hex8(device); for(i = 0; (i < 256) ; i++) { unsigned char byte; if ((i % 16) == 0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex8(i); print_debug(": "); } @@ -290,7 +290,7 @@ void dump_spd_registers(void) if (status < 0) { print_debug("bad device: "); print_debug_hex8(-status); - print_debug("\r\n"); + print_debug("\n"); break; } print_debug_hex8(status); @@ -308,7 +308,7 @@ void dump_ipmi_registers(void) while(device <= 0x42) { int status = 0; int i; - print_debug("\r\n"); + print_debug("\n"); print_debug("ipmi "); print_debug_hex8(device); @@ -318,7 +318,7 @@ void dump_ipmi_registers(void) if (status < 0) { print_debug("bad device: "); print_debug_hex8(-status); - print_debug("\r\n"); + print_debug("\n"); break; } print_debug_hex8(status); diff --git a/src/mainboard/supermicro/x6dhr_ig/watchdog.c b/src/mainboard/supermicro/x6dhr_ig/watchdog.c index e9012a49f3..a4c1eec04f 100644 --- a/src/mainboard/supermicro/x6dhr_ig/watchdog.c +++ b/src/mainboard/supermicro/x6dhr_ig/watchdog.c @@ -94,6 +94,6 @@ static void disable_watchdogs(void) // disable_sio_watchdog(NSC_WD_DEV); disable_ich5_watchdog(); // disable_jarell_frb3(); - print_debug("Watchdogs disabled\r\n"); + print_debug("Watchdogs disabled\n"); } diff --git a/src/mainboard/supermicro/x6dhr_ig2/debug.c b/src/mainboard/supermicro/x6dhr_ig2/debug.c index 5546421156..b4f2a185b3 100644 --- a/src/mainboard/supermicro/x6dhr_ig2/debug.c +++ b/src/mainboard/supermicro/x6dhr_ig2/debug.c @@ -12,7 +12,7 @@ static void print_reg(unsigned char index) print_debug_hex8(index); print_debug(": 0x"); print_debug_hex8(data); - print_debug("\r\n"); + print_debug("\n"); return; } @@ -49,52 +49,52 @@ static void siodump(void) int i; unsigned char data; - print_debug("\r\n*** SERVER I/O REGISTERS ***\r\n"); + print_debug("\n*** SERVER I/O REGISTERS ***\n"); for (i=0x10; i<=0x2d; i++) { print_reg((unsigned char)i); } #if 0 - print_debug("\r\n*** XBUS REGISTERS ***\r\n"); + print_debug("\n*** XBUS REGISTERS ***\n"); setup_func(0x0f); for (i=0xf0; i<=0xff; i++) { print_reg((unsigned char)i); } - print_debug("\r\n*** SERIAL 1 CONFIG REGISTERS ***\r\n"); + print_debug("\n*** SERIAL 1 CONFIG REGISTERS ***\n"); setup_func(0x03); print_reg(0xf0); - print_debug("\r\n*** SERIAL 2 CONFIG REGISTERS ***\r\n"); + print_debug("\n*** SERIAL 2 CONFIG REGISTERS ***\n"); setup_func(0x02); print_reg(0xf0); #endif - print_debug("\r\n*** GPIO REGISTERS ***\r\n"); + print_debug("\n*** GPIO REGISTERS ***\n"); setup_func(0x07); for (i=0xf0; i<=0xf8; i++) { print_reg((unsigned char)i); } - print_debug("\r\n*** GPIO VALUES ***\r\n"); + print_debug("\n*** GPIO VALUES ***\n"); data = inb(0x68a); - print_debug("\r\nGPDO 4: 0x"); + print_debug("\nGPDO 4: 0x"); print_debug_hex8(data); data = inb(0x68b); - print_debug("\r\nGPDI 4: 0x"); + print_debug("\nGPDI 4: 0x"); print_debug_hex8(data); - print_debug("\r\n"); + print_debug("\n"); #if 0 - print_debug("\r\n*** WATCHDOG TIMER REGISTERS ***\r\n"); + print_debug("\n*** WATCHDOG TIMER REGISTERS ***\n"); setup_func(0x0a); print_reg(0xf0); - print_debug("\r\n*** FAN CONTROL REGISTERS ***\r\n"); + print_debug("\n*** FAN CONTROL REGISTERS ***\n"); setup_func(0x09); print_reg(0xf0); print_reg(0xf1); - print_debug("\r\n*** RTC REGISTERS ***\r\n"); + print_debug("\n*** RTC REGISTERS ***\n"); setup_func(0x10); print_reg(0xf0); print_reg(0xf1); @@ -104,7 +104,7 @@ static void siodump(void) print_reg(0xfe); print_reg(0xff); - print_debug("\r\n*** HEALTH MONITORING & CONTROL REGISTERS ***\r\n"); + print_debug("\n*** HEALTH MONITORING & CONTROL REGISTERS ***\n"); setup_func(0x14); print_reg(0xf0); #endif @@ -135,7 +135,7 @@ static void print_pci_devices(void) continue; } print_debug_pci_dev(dev); - print_debug("\r\n"); + print_debug("\n"); } } @@ -143,7 +143,7 @@ static void dump_pci_device(unsigned dev) { int i; print_debug_pci_dev(dev); - print_debug("\r\n"); + print_debug("\n"); for(i = 0; i <= 255; i++) { unsigned char val; @@ -155,7 +155,7 @@ static void dump_pci_device(unsigned dev) print_debug_char(' '); print_debug_hex8(val); if ((i & 0x0f) == 0x0f) { - print_debug("\r\n"); + print_debug("\n"); } } } @@ -165,7 +165,7 @@ static void dump_bar14(unsigned dev) int i; unsigned long bar; - print_debug("BAR 14 Dump\r\n"); + print_debug("BAR 14 Dump\n"); bar = pci_read_config32(dev, 0x14); for(i = 0; i <= 0x300; i+=4) { @@ -178,14 +178,14 @@ static void dump_bar14(unsigned dev) val = pci_read_config8(dev, i); #endif if((i%4)==0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex16(i); print_debug_char(' '); } print_debug_hex32(read32(bar + i)); print_debug_char(' '); } - print_debug("\r\n"); + print_debug("\n"); } static void dump_pci_devices(void) @@ -209,7 +209,7 @@ static void dump_pci_devices(void) static void dump_spd_registers(const struct mem_controller *ctrl) { int i; - print_debug("\r\n"); + print_debug("\n"); for(i = 0; i < 4; i++) { unsigned device; device = ctrl->channel0[i]; @@ -223,20 +223,20 @@ static void dump_spd_registers(const struct mem_controller *ctrl) int status; unsigned char byte; if ((j & 0xf) == 0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex8(j); print_debug(": "); } status = smbus_read_byte(device, j); if (status < 0) { - print_debug("bad device\r\n"); + print_debug("bad device\n"); break; } byte = status & 0xff; print_debug_hex8(byte); print_debug_char(' '); } - print_debug("\r\n"); + print_debug("\n"); } device = ctrl->channel1[i]; if (device) { @@ -249,20 +249,20 @@ static void dump_spd_registers(const struct mem_controller *ctrl) int status; unsigned char byte; if ((j & 0xf) == 0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex8(j); print_debug(": "); } status = smbus_read_byte(device, j); if (status < 0) { - print_debug("bad device\r\n"); + print_debug("bad device\n"); break; } byte = status & 0xff; print_debug_hex8(byte); print_debug_char(' '); } - print_debug("\r\n"); + print_debug("\n"); } } } @@ -275,14 +275,14 @@ void dump_spd_registers(void) while(device <= SMBUS_MEM_DEVICE_END) { int status = 0; int i; - print_debug("\r\n"); + print_debug("\n"); print_debug("dimm "); print_debug_hex8(device); for(i = 0; (i < 256) ; i++) { unsigned char byte; if ((i % 16) == 0) { - print_debug("\r\n"); + print_debug("\n"); print_debug_hex8(i); print_debug(": "); } @@ -290,7 +290,7 @@ void dump_spd_registers(void) if (status < 0) { print_debug("bad device: "); print_debug_hex8(-status); - print_debug("\r\n"); + print_debug("\n"); break; } print_debug_hex8(status); @@ -308,7 +308,7 @@ void dump_ipmi_registers(void) while(device <= 0x42) { int status = 0; int i; - print_debug("\r\n"); + print_debug("\n"); print_debug("ipmi "); print_debug_hex8(device); @@ -318,7 +318,7 @@ void dump_ipmi_registers(void) if (status < 0) { print_debug("bad device: "); print_debug_hex8(-status); - print_debug("\r\n"); + print_debug("\n"); break; } print_debug_hex8(status); diff --git a/src/mainboard/supermicro/x6dhr_ig2/watchdog.c b/src/mainboard/supermicro/x6dhr_ig2/watchdog.c index e9012a49f3..a4c1eec04f 100644 --- a/src/mainboard/supermicro/x6dhr_ig2/watchdog.c +++ b/src/mainboard/supermicro/x6dhr_ig2/watchdog.c @@ -94,6 +94,6 @@ static void disable_watchdogs(void) // disable_sio_watchdog(NSC_WD_DEV); disable_ich5_watchdog(); // disable_jarell_frb3(); - print_debug("Watchdogs disabled\r\n"); + print_debug("Watchdogs disabled\n"); } diff --git a/src/mainboard/technexion/tim5690/romstage.c b/src/mainboard/technexion/tim5690/romstage.c index 4f4cb1505f..f3d6be0a1f 100644 --- a/src/mainboard/technexion/tim5690/romstage.c +++ b/src/mainboard/technexion/tim5690/romstage.c @@ -184,7 +184,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) printk(BIOS_DEBUG, "needs_reset=0x%x\n", needs_reset); if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/technexion/tim8690/romstage.c b/src/mainboard/technexion/tim8690/romstage.c index 1fba17f88b..a16bf7ca51 100644 --- a/src/mainboard/technexion/tim8690/romstage.c +++ b/src/mainboard/technexion/tim8690/romstage.c @@ -178,7 +178,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) printk(BIOS_DEBUG, "needs_reset=0x%x\n", needs_reset); if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/technologic/ts5300/romstage.c b/src/mainboard/technologic/ts5300/romstage.c index 7fd5423c5d..d585edd476 100644 --- a/src/mainboard/technologic/ts5300/romstage.c +++ b/src/mainboard/technologic/ts5300/romstage.c @@ -56,18 +56,18 @@ static void identify_ts9500(void) TS9500_LED_ON; - print_err("TS-9500 add-on found:\r\n"); + print_err("TS-9500 add-on found:\n"); val=inb(0x19b); for (i=0; i<8; i++) { print_err(" DIP"); print_err_char(i+0x31); print_err(": "); if((val&(1<<i))!=0) - print_err("on\r\n"); + print_err("on\n"); else - print_err("off\r\n"); + print_err("off\n"); } - print_err("\r\n"); + print_err("\n"); val=inb(0x19a); @@ -76,11 +76,11 @@ static void identify_ts9500(void) print_err_char(i+0x30-5); print_err(": "); if((val&(1<<i))!=0) - print_err("on\r\n"); + print_err("on\n"); else - print_err("off\r\n"); + print_err("off\n"); } - print_err("\r\n"); + print_err("\n"); TS9500_LED_OFF; } @@ -92,29 +92,29 @@ static void identify_system(void) print_err("Mainboard: "); val=inb(0x74); switch(val) { - case 0x50: print_err("TS-5300\r\n"); break; - case 0x40: print_err("TS-5400\r\n"); break; - case 0x60: print_err("TS-5500\r\n"); break; - case 0x20: print_err("TS-5600\r\n"); break; - case 0x70: print_err("TS-5700\r\n"); break; - default: print_err("unknown\r\n"); break; + case 0x50: print_err("TS-5300\n"); break; + case 0x40: print_err("TS-5400\n"); break; + case 0x60: print_err("TS-5500\n"); break; + case 0x20: print_err("TS-5600\n"); break; + case 0x70: print_err("TS-5700\n"); break; + default: print_err("unknown\n"); break; } val=inb(0x75); print_err(" SRAM option: "); if((val&1)==0) print_err("not "); - print_err("installed\r\n"); + print_err("installed\n"); print_err(" RS-485 option: "); if((val&2)==0) print_err("not "); - print_err("installed\r\n"); + print_err("installed\n"); val=inb(0x76); print_err(" Temp. range: "); - if((val&2)==0) print_err("commercial\r\n"); - else print_err("industrial\r\n"); + if((val&2)==0) print_err("commercial\n"); + else print_err("industrial\n"); - print_err("\r\n"); + print_err("\n"); val=inb(0x77); for (i=1; i<8; i++) { @@ -122,11 +122,11 @@ static void identify_system(void) print_err_char(i+0x30); print_err(": "); if((val&(1<<i))!=0) - print_err("on\r\n"); + print_err("on\n"); else - print_err("off\r\n"); + print_err("off\n"); } - print_err("\r\n"); + print_err("\n"); /* Detect TS-9500 */ val=inb(0x19d); @@ -157,9 +157,9 @@ static void main(unsigned long bist) console_init(); - print_err("Technologic Systems TS5300 - http://www.embeddedx86.com/\r\n"); + print_err("Technologic Systems TS5300 - http://www.embeddedx86.com/\n"); staticmem(); - print_err("Memory initialized: 32MB\r\n"); + print_err("Memory initialized: 32MB\n"); #if 1 identify_system(); @@ -167,7 +167,7 @@ static void main(unsigned long bist) #if 0 // Check 32MB of memory @ 0 (very slow!) - print_err("Checking memory:\r\n"); + print_err("Checking memory:\n"); ram_check(0x00000000, 0x000a0000); ram_check(0x000b0000, 0x02000000); #endif diff --git a/src/mainboard/tyan/s2735/romstage.c b/src/mainboard/tyan/s2735/romstage.c index 74d043b04a..b9a566ef11 100644 --- a/src/mainboard/tyan/s2735/romstage.c +++ b/src/mainboard/tyan/s2735/romstage.c @@ -129,9 +129,9 @@ void amd64_main(unsigned long bist) : "=a" (v_esp) ); #if CONFIG_USE_PRINTK_IN_CAR - printk(BIOS_DEBUG, "v_esp=%08x\r\n", v_esp); + printk(BIOS_DEBUG, "v_esp=%08x\n", v_esp); #else - print_debug("v_esp="); print_debug_hex32(v_esp); print_debug("\r\n"); + print_debug("v_esp="); print_debug_hex32(v_esp); print_debug("\n"); #endif } @@ -141,9 +141,9 @@ void amd64_main(unsigned long bist) cpu_reset_x: #if CONFIG_USE_PRINTK_IN_CAR - printk(BIOS_DEBUG, "cpu_reset = %08x\r\n",cpu_reset); + printk(BIOS_DEBUG, "cpu_reset = %08x\n",cpu_reset); #else - print_debug("cpu_reset = "); print_debug_hex32(cpu_reset); print_debug("\r\n"); + print_debug("cpu_reset = "); print_debug_hex32(cpu_reset); print_debug("\n"); #endif if(cpu_reset == 0) { @@ -184,21 +184,21 @@ cpu_reset_x: /* We can not go back any more, we lost old stack data in cache as ram*/ if(new_cpu_reset==0) { - print_debug("Use Ram as Stack now - done\r\n"); + print_debug("Use Ram as Stack now - done\n"); } else { - print_debug("Use Ram as Stack now - \r\n"); + print_debug("Use Ram as Stack now - \n"); } #if CONFIG_USE_PRINTK_IN_CAR - printk(BIOS_DEBUG, "new_cpu_reset = %08x\r\n", new_cpu_reset); + printk(BIOS_DEBUG, "new_cpu_reset = %08x\n", new_cpu_reset); #else - print_debug("new_cpu_reset = "); print_debug_hex32(new_cpu_reset); print_debug("\r\n"); + print_debug("new_cpu_reset = "); print_debug_hex32(new_cpu_reset); print_debug("\n"); #endif #ifdef DEACTIVATE_CAR print_debug("Deactivating CAR"); #include DEACTIVATE_CAR_FILE - print_debug(" - Done.\r\n"); + print_debug(" - Done.\n"); #endif /*copy and execute coreboot_ram */ copy_and_run(new_cpu_reset); @@ -206,7 +206,7 @@ cpu_reset_x: } #endif - print_debug("should not be here -\r\n"); + print_debug("should not be here -\n"); } diff --git a/src/mainboard/tyan/s2850/romstage.c b/src/mainboard/tyan/s2850/romstage.c index 3dfc851460..c251e6dcec 100644 --- a/src/mainboard/tyan/s2850/romstage.c +++ b/src/mainboard/tyan/s2850/romstage.c @@ -144,7 +144,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) needs_reset |= ht_setup_chains_x(); if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/tyan/s2875/romstage.c b/src/mainboard/tyan/s2875/romstage.c index ee5c659ad8..348083b67b 100644 --- a/src/mainboard/tyan/s2875/romstage.c +++ b/src/mainboard/tyan/s2875/romstage.c @@ -143,7 +143,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) needs_reset |= ht_setup_chains_x(); if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/tyan/s2880/romstage.c b/src/mainboard/tyan/s2880/romstage.c index 13e5305eea..9d092d8050 100644 --- a/src/mainboard/tyan/s2880/romstage.c +++ b/src/mainboard/tyan/s2880/romstage.c @@ -145,7 +145,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) needs_reset |= ht_setup_chains_x(); if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/tyan/s2881/romstage.c b/src/mainboard/tyan/s2881/romstage.c index 50593b83bf..bb13bb4246 100644 --- a/src/mainboard/tyan/s2881/romstage.c +++ b/src/mainboard/tyan/s2881/romstage.c @@ -154,7 +154,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) needs_reset |= ht_setup_chains_x(); if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/tyan/s2882/romstage.c b/src/mainboard/tyan/s2882/romstage.c index 41da91c842..db1342f797 100644 --- a/src/mainboard/tyan/s2882/romstage.c +++ b/src/mainboard/tyan/s2882/romstage.c @@ -149,7 +149,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) needs_reset |= ht_setup_chains_x(); if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/tyan/s2885/romstage.c b/src/mainboard/tyan/s2885/romstage.c index 470b3e384a..0f1b09e20b 100644 --- a/src/mainboard/tyan/s2885/romstage.c +++ b/src/mainboard/tyan/s2885/romstage.c @@ -158,7 +158,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) needs_reset |= ht_setup_chains_x(); if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/tyan/s2891/romstage.c b/src/mainboard/tyan/s2891/romstage.c index 149c0c84fb..022fa7ecb0 100644 --- a/src/mainboard/tyan/s2891/romstage.c +++ b/src/mainboard/tyan/s2891/romstage.c @@ -169,7 +169,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) needs_reset |= ck804_early_setup_x(); if (needs_reset) { - printk(BIOS_INFO, "ht reset -\r\n"); + printk(BIOS_INFO, "ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/tyan/s2912/ap_romstage.c b/src/mainboard/tyan/s2912/ap_romstage.c index 7c9b43862c..a477b6891d 100644 --- a/src/mainboard/tyan/s2912/ap_romstage.c +++ b/src/mainboard/tyan/s2912/ap_romstage.c @@ -79,7 +79,7 @@ void hardwaremain(int ret_addr) id = get_node_core_id_x(); //FIXME: for USBDEBUG_DIRECT you need to make sure dbg_info get assigned in AP - print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\r\n"); + print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n"); train_ram(id.nodeid, sysinfo, sysinfox); diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c index 0a07dfede8..85b5321ac8 100644 --- a/src/mainboard/tyan/s2912/romstage.c +++ b/src/mainboard/tyan/s2912/romstage.c @@ -211,7 +211,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) console_init(); printk(BIOS_DEBUG, "*sysinfo range: [%p,%p]\n",sysinfo,sysinfo+1); - print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\r\n"); + print_debug("bsp_apicid="); print_debug_hex8(bsp_apicid); print_debug("\n"); #if CONFIG_MEM_TRAIN_SEQ == 1 set_sysinfo_in_ram(0); // in BSP so could hold all ap until sysinfo is in ram @@ -237,7 +237,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { msr_t msr; msr=rdmsr(0xc0010042); - print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); + print_debug("begin msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); } @@ -251,7 +251,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { msr_t msr; msr=rdmsr(0xc0010042); - print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\r\n"); + print_debug("end msr fid, vid "); print_debug_hex32( msr.hi ); print_debug_hex32(msr.lo); print_debug("\n"); } #endif @@ -262,7 +262,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) // fidvid change will issue one LDTSTOP and the HT change will be effective too if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/tyan/s4880/romstage.c b/src/mainboard/tyan/s4880/romstage.c index 430e547164..229db170dc 100644 --- a/src/mainboard/tyan/s4880/romstage.c +++ b/src/mainboard/tyan/s4880/romstage.c @@ -66,11 +66,11 @@ static inline void change_i2c_mux(unsigned device) { #define SMBUS_HUB 0x18 int ret; - print_debug("change_i2c_mux i="); print_debug_hex8(device); print_debug("\r\n"); + print_debug("change_i2c_mux i="); print_debug_hex8(device); print_debug("\n"); ret = smbus_write_byte(SMBUS_HUB, 0x01, device); - print_debug("change_i2c_mux 1 ret="); print_debug_hex32(ret); print_debug("\r\n"); + print_debug("change_i2c_mux 1 ret="); print_debug_hex32(ret); print_debug("\n"); ret = smbus_write_byte(SMBUS_HUB, 0x03, 0); - print_debug("change_i2c_mux 2 ret="); print_debug_hex32(ret); print_debug("\r\n"); + print_debug("change_i2c_mux 2 ret="); print_debug_hex32(ret); print_debug("\n"); } #endif @@ -195,7 +195,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) needs_reset |= ht_setup_chains_x(); if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/tyan/s4882/romstage.c b/src/mainboard/tyan/s4882/romstage.c index 11c36cb698..d44203c090 100644 --- a/src/mainboard/tyan/s4882/romstage.c +++ b/src/mainboard/tyan/s4882/romstage.c @@ -70,14 +70,14 @@ static inline void change_i2c_mux(unsigned device) { #define SMBUS_HUB 0x18 int ret, i; - print_debug("change_i2c_mux i="); print_debug_hex8(device); print_debug("\r\n"); + print_debug("change_i2c_mux i="); print_debug_hex8(device); print_debug("\n"); i=2; do { ret = smbus_write_byte(SMBUS_HUB, 0x01, device); - print_debug("change_i2c_mux 1 ret="); print_debug_hex32(ret); print_debug("\r\n"); + print_debug("change_i2c_mux 1 ret="); print_debug_hex32(ret); print_debug("\n"); } while ((ret!=0) && (i-->0)); ret = smbus_write_byte(SMBUS_HUB, 0x03, 0); - print_debug("change_i2c_mux 2 ret="); print_debug_hex32(ret); print_debug("\r\n"); + print_debug("change_i2c_mux 2 ret="); print_debug_hex32(ret); print_debug("\n"); } #endif @@ -178,7 +178,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) needs_reset |= ht_setup_chains_x(); if (needs_reset) { - print_info("ht reset -\r\n"); + print_info("ht reset -\n"); soft_reset(); } diff --git a/src/mainboard/via/epia-cn/romstage.c b/src/mainboard/via/epia-cn/romstage.c index 960a738b6d..c68c753dad 100644 --- a/src/mainboard/via/epia-cn/romstage.c +++ b/src/mainboard/via/epia-cn/romstage.c @@ -98,26 +98,26 @@ static void main(unsigned long bist) uart_init(); console_init(); - print_spew("In romstage.c:main()\r\n"); + print_spew("In romstage.c:main()\n"); enable_smbus(); smbus_fixup(&ctrl); if (bist == 0) { - print_debug("doing early_mtrr\r\n"); + print_debug("doing early_mtrr\n"); early_mtrr_init(); } /* Halt if there was a built-in self test failure. */ report_bist_failure(bist); - print_debug("Enabling mainboard devices\r\n"); + print_debug("Enabling mainboard devices\n"); enable_mainboard_devices(); ddr_ram_setup(&ctrl); /* ram_check(0, 640 * 1024); */ - print_spew("Leaving romstage.c:main()\r\n"); + print_spew("Leaving romstage.c:main()\n"); } diff --git a/src/mainboard/via/epia-m/romstage.c b/src/mainboard/via/epia-m/romstage.c index 2d741a1246..0a5ddbc8ae 100644 --- a/src/mainboard/via/epia-m/romstage.c +++ b/src/mainboard/via/epia-m/romstage.c @@ -102,7 +102,7 @@ static void main(unsigned long bist) enable_smbus(); - print_spew("In romstage.c:main()\r\n"); + print_spew("In romstage.c:main()\n"); /* Halt if there was a built in self test failure */ report_bist_failure(bist); @@ -111,10 +111,10 @@ static void main(unsigned long bist) outb(5, 0x80); - print_debug(" Enabling mainboard devices\r\n"); + print_debug(" Enabling mainboard devices\n"); enable_mainboard_devices(); - print_debug(" Enabling shadow ram\r\n"); + print_debug(" Enabling shadow ram\n"); enable_shadow_ram(); ddr_ram_setup((const struct mem_controller *)0); @@ -141,12 +141,12 @@ static void main(unsigned long bist) #endif if (bist == 0) { - print_debug(" Doing MTRR init.\r\n"); + print_debug(" Doing MTRR init.\n"); early_mtrr_init(); } //dump_pci_devices(); - print_spew("Leaving romstage.c:main()\r\n"); + print_spew("Leaving romstage.c:main()\n"); } diff --git a/src/mainboard/via/epia-m700/romstage.c b/src/mainboard/via/epia-m700/romstage.c index 80de0afc71..316c0be8c1 100644 --- a/src/mainboard/via/epia-m700/romstage.c +++ b/src/mainboard/via/epia-m700/romstage.c @@ -76,13 +76,13 @@ int acpi_is_wakeup_early_via_vx800(void) device_t dev; u16 tmp, result; - print_debug("In acpi_is_wakeup_early_via_vx800\r\n"); + print_debug("In acpi_is_wakeup_early_via_vx800\n"); /* Power management controller */ dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VX855_LPC), 0); if (dev == PCI_DEV_INVALID) - die("Power management controller not found\r\n"); + die("Power management controller not found\n"); /* Set ACPI base address to I/O VX800_ACPI_IO_BASE. */ pci_write_config16(dev, 0x88, VX800_ACPI_IO_BASE | 0x1); @@ -94,7 +94,7 @@ int acpi_is_wakeup_early_via_vx800(void) result = ((tmp & (7 << 10)) >> 10) == 1 ? 3 : 0; print_debug(" boot_mode="); print_debug_hex16(result); - print_debug("\r\n"); + print_debug("\n"); return result; } @@ -142,7 +142,7 @@ static void enable_mainboard_devices(void) pci_write_config8(dev, 0x5b, 0x01); #endif - print_debug("In enable_mainboard_devices \r\n"); + print_debug("In enable_mainboard_devices \n"); /* Enable P2P Bridge Header for external PCI bus. */ dev = pci_locate_device(PCI_ID(0x1106, 0xa353), 0); @@ -482,7 +482,7 @@ void amd64_main(unsigned long bist) * early_mtrr_init() call. */ #if 0 - print_debug("doing early_mtrr\r\n"); + print_debug("doing early_mtrr\n"); early_mtrr_init(); #endif } @@ -490,7 +490,7 @@ void amd64_main(unsigned long bist) /* Halt if there was a built-in self test failure. */ report_bist_failure(bist); - print_debug("Enabling mainboard devices\r\n"); + print_debug("Enabling mainboard devices\n"); enable_mainboard_devices(); /* @@ -501,7 +501,7 @@ void amd64_main(unsigned long bist) Data = pci_read_config8(device, 0xf6); print_debug("NB chip revision ="); print_debug_hex8(Data); - print_debug("\r\n"); + print_debug("\n"); /* Make NB ready before DRAM init. */ via_pci_inittable(Data, mNbStage1InitTbl); @@ -518,7 +518,7 @@ void amd64_main(unsigned long bist) u8 ramregs[] = { 0x43, 0x42, 0x41, 0x40 }; DRAM_SYS_ATTR DramAttr; - print_debug("This is an S3 wakeup\r\n"); + print_debug("This is an S3 wakeup\n"); memset(&DramAttr, 0, sizeof(DRAM_SYS_ATTR)); /* @@ -553,7 +553,7 @@ void amd64_main(unsigned long bist) /* Just copy this function from draminit to here! */ SetUMARam(); - print_debug("Resume from S3, RAM init was ignored\r\n"); + print_debug("Resume from S3, RAM init was ignored\n"); } else { ddr2_ram_setup(); ram_check(0, 640 * 1024); @@ -675,7 +675,7 @@ void amd64_main(unsigned long bist) ); #endif /* This can have function call, because no variable used before this. */ - print_debug("Copy memory to high memory to protect s3 wakeup vector code \r\n"); + print_debug("Copy memory to high memory to protect s3 wakeup vector code \n"); memcpy((unsigned char *)((*(u32 *) WAKE_MEM_INFO) - 64 * 1024 - 0x100000), (unsigned char *)0, 0xa0000); memcpy((unsigned char *)((*(u32 *) WAKE_MEM_INFO) - 64 * 1024 - @@ -725,11 +725,11 @@ void amd64_main(unsigned long bist) unsigned v_esp; __asm__ volatile ("movl %%esp, %0\n\t":"=a" (v_esp)); #if CONFIG_USE_PRINTK_IN_CAR - printk(BIOS_DEBUG, "v_esp=%08x\r\n", v_esp); + printk(BIOS_DEBUG, "v_esp=%08x\n", v_esp); #else print_debug("v_esp="); print_debug_hex32(v_esp); - print_debug("\r\n"); + print_debug("\n"); #endif } #endif @@ -744,11 +744,11 @@ cpu_reset_x: cpu_reset = 0; #if CONFIG_USE_PRINTK_IN_CAR - printk(BIOS_DEBUG, "cpu_reset = %08x\r\n", cpu_reset); + printk(BIOS_DEBUG, "cpu_reset = %08x\n", cpu_reset); #else print_debug("cpu_reset = "); print_debug_hex32(cpu_reset); - print_debug("\r\n"); + print_debug("\n"); #endif if (cpu_reset == 0) @@ -789,16 +789,16 @@ cpu_reset_x: /* We can't go back anymore, we lost old stack data in CAR. */ if (new_cpu_reset == 0) - print_debug("Use Ram as Stack now - done\r\n"); + print_debug("Use Ram as Stack now - done\n"); else - print_debug("Use Ram as Stack now - \r\n"); + print_debug("Use Ram as Stack now - \n"); #if CONFIG_USE_PRINTK_IN_CAR - printk(BIOS_DEBUG, "new_cpu_reset = %08x\r\n", new_cpu_reset); + printk(BIOS_DEBUG, "new_cpu_reset = %08x\n", new_cpu_reset); #else print_debug("new_cpu_reset = "); print_debug_hex32(new_cpu_reset); - print_debug("\r\n"); + print_debug("\n"); #endif jason_tsc_count_car(); @@ -808,6 +808,6 @@ cpu_reset_x: } #endif - print_debug("should not be here -\r\n"); + print_debug("should not be here -\n"); } diff --git a/src/mainboard/via/epia-n/romstage.c b/src/mainboard/via/epia-n/romstage.c index 9819048a25..9abef9b962 100644 --- a/src/mainboard/via/epia-n/romstage.c +++ b/src/mainboard/via/epia-n/romstage.c @@ -124,7 +124,7 @@ static void main(unsigned long bist) uart_init(); console_init(); - print_spew("In romstage.c:main()\r\n"); + print_spew("In romstage.c:main()\n"); enable_smbus(); smbus_fixup(&ctrl); @@ -132,25 +132,25 @@ static void main(unsigned long bist) /* Halt if there was a built-in self test failure. */ report_bist_failure(bist); - print_debug("Enabling mainboard devices\r\n"); + print_debug("Enabling mainboard devices\n"); enable_mainboard_devices(); - print_debug("Enable F-ROM Shadow RAM\r\n"); + print_debug("Enable F-ROM Shadow RAM\n"); enable_shadow_ram(); /* setup cpu */ - print_debug("Setup CPU Interface\r\n"); + print_debug("Setup CPU Interface\n"); c3_cpu_setup(ctrl.d0f2); ddr_ram_setup(); if (bist == 0) { - print_debug("doing early_mtrr\r\n"); + print_debug("doing early_mtrr\n"); early_mtrr_init(); } //ram_check(0, 640 * 1024); - print_spew("Leaving romstage.c:main()\r\n"); + print_spew("Leaving romstage.c:main()\n"); } diff --git a/src/mainboard/via/vt8454c/debug.c b/src/mainboard/via/vt8454c/debug.c index 54d8cf34e5..3212495f71 100644 --- a/src/mainboard/via/vt8454c/debug.c +++ b/src/mainboard/via/vt8454c/debug.c @@ -42,7 +42,7 @@ static void print_pci_devices(void) continue; } print_debug_pci_dev(dev); - print_debug("\r\n"); + print_debug("\n"); } } @@ -50,7 +50,7 @@ static void dump_pci_device(unsigned dev) { int i; print_debug_pci_dev(dev); - print_debug("\r\n"); + print_debug("\n"); for (i = 0; i <= 255; i++) { unsigned char val; @@ -62,7 +62,7 @@ static void dump_pci_device(unsigned dev) print_debug_char(' '); print_debug_hex8(val); if ((i & 0x0f) == 0x0f) { - print_debug("\r\n"); + print_debug("\n"); } } } @@ -90,7 +90,7 @@ static void dump_io_resources(unsigned port) int i; udelay(2000); print_debug_hex16(port); - print_debug(":\r\n"); + print_debug(":\n"); for (i = 0; i < 256; i++) { u8 val; if ((i & 0x0f) == 0) { @@ -101,7 +101,7 @@ static void dump_io_resources(unsigned port) print_debug_char(' '); print_debug_hex8(val); if ((i & 0x0f) == 0x0f) { - print_debug("\r\n"); + print_debug("\n"); } port++; } diff --git a/src/mainboard/via/vt8454c/romstage.c b/src/mainboard/via/vt8454c/romstage.c index 719a3581e6..0680fe1b2a 100644 --- a/src/mainboard/via/vt8454c/romstage.c +++ b/src/mainboard/via/vt8454c/romstage.c @@ -121,7 +121,7 @@ static void main(unsigned long bist) #ifdef DEACTIVATE_CAR print_debug("Deactivating CAR"); #include DEACTIVATE_CAR_FILE - print_debug(" - Done.\r\n"); + print_debug(" - Done.\n"); #endif copy_and_run(0); } |