diff options
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/google/chell/devicetree.cb | 20 | ||||
-rw-r--r-- | src/mainboard/google/eve/devicetree.cb | 16 | ||||
-rw-r--r-- | src/mainboard/google/glados/devicetree.cb | 20 | ||||
-rw-r--r-- | src/mainboard/google/lars/devicetree.cb | 20 | ||||
-rw-r--r-- | src/mainboard/intel/kblrvp/devicetree.cb | 30 | ||||
-rw-r--r-- | src/mainboard/intel/kunimitsu/devicetree.cb | 20 |
6 files changed, 63 insertions, 63 deletions
diff --git a/src/mainboard/google/chell/devicetree.cb b/src/mainboard/google/chell/devicetree.cb index 238a5a5109..34250d3450 100644 --- a/src/mainboard/google/chell/devicetree.cb +++ b/src/mainboard/google/chell/devicetree.cb @@ -151,17 +151,17 @@ chip soc/intel/skylake # RP 1 uses SRCCLKREQ1# register "PcieRpClkReqNumber[0]" = "1" - register "usb2_ports[0]" = "USB2_PORT_LONG" # Type-C Port 1 - register "usb2_ports[1]" = "USB2_PORT_LONG" # Type-C Port 2 - register "usb2_ports[2]" = "USB2_PORT_MID" # Bluetooth - register "usb2_ports[4]" = "USB2_PORT_MID" # Type-A Port - register "usb2_ports[6]" = "USB2_PORT_FLEX" # Camera - register "usb2_ports[8]" = "USB2_PORT_MID" # SD + register "usb2_ports[0]" = "USB2_PORT_LONG(OC2)" # Type-C Port 1 + register "usb2_ports[1]" = "USB2_PORT_LONG(OC3)" # Type-C Port 2 + register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth + register "usb2_ports[4]" = "USB2_PORT_MID(OC0)" # Type-A Port + register "usb2_ports[6]" = "USB2_PORT_FLEX(OC_SKIP)" # Camera + register "usb2_ports[8]" = "USB2_PORT_MID(OC_SKIP)" # SD - register "usb3_ports[0]" = "USB3_PORT_DEFAULT" # Type-C Port 1 - register "usb3_ports[1]" = "USB3_PORT_DEFAULT" # Type-C Port 2 - register "usb3_ports[2]" = "USB3_PORT_DEFAULT" # Type-A Port - register "usb3_ports[3]" = "USB3_PORT_DEFAULT" # SD + register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)" # Type-C Port 1 + register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC3)" # Type-C Port 2 + register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC0)" # Type-A Port + register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # SD register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb index 37a5ff0712..f757d317ee 100644 --- a/src/mainboard/google/eve/devicetree.cb +++ b/src/mainboard/google/eve/devicetree.cb @@ -148,15 +148,15 @@ chip soc/intel/skylake # RP 1 uses SRCCLKREQ1# register "PcieRpClkReqNumber[0]" = "1" - register "usb2_ports[0]" = "USB2_PORT_LONG" # Type-C Port 1 - register "usb2_ports[1]" = "USB2_PORT_FLEX" # Camera - register "usb2_ports[2]" = "USB2_PORT_MID" # Bluetooth - register "usb2_ports[4]" = "USB2_PORT_LONG" # Type-C Port 2 - register "usb2_ports[6]" = "USB2_PORT_MID" # Type-A Port - register "usb2_ports[8]" = "USB2_PORT_EMPTY" # Empty + register "usb2_ports[0]" = "USB2_PORT_LONG(OC0)" # Type-C Port 1 + register "usb2_ports[1]" = "USB2_PORT_FLEX(OC_SKIP)" # Camera + register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth + register "usb2_ports[4]" = "USB2_PORT_LONG(OC1)" # Type-C Port 2 + register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port + register "usb2_ports[8]" = "USB2_PORT_EMPTY" # Empty - register "usb3_ports[0]" = "USB3_PORT_DEFAULT" # Type-C Port 1 - register "usb3_ports[1]" = "USB3_PORT_DEFAULT" # Type-C Port 2 + register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # Type-C Port 1 + register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC1)" # Type-C Port 2 register "usb3_ports[2]" = "USB3_PORT_EMPTY" # Empty register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Empty diff --git a/src/mainboard/google/glados/devicetree.cb b/src/mainboard/google/glados/devicetree.cb index d17ef6cc0c..d0584ea7c9 100644 --- a/src/mainboard/google/glados/devicetree.cb +++ b/src/mainboard/google/glados/devicetree.cb @@ -151,17 +151,17 @@ chip soc/intel/skylake # RP 1 uses SRCCLKREQ1# register "PcieRpClkReqNumber[0]" = "1" - register "usb2_ports[0]" = "USB2_PORT_TYPE_C" # Type-C Port (board) - register "usb2_ports[1]" = "USB2_PORT_MAX" # Type-C Port (flex) - register "usb2_ports[2]" = "USB2_PORT_MID" # Bluetooth - register "usb2_ports[4]" = "USB2_PORT_MID" # Type-A Port 1 - register "usb2_ports[6]" = "USB2_PORT_FLEX" # Camera - register "usb2_ports[8]" = "USB2_PORT_MID" # Type-A Port 2 + register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC2)" # Type-C Port (board) + register "usb2_ports[1]" = "USB2_PORT_MAX(OC3)" # Type-C Port (flex) + register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth + register "usb2_ports[4]" = "USB2_PORT_MID(OC0)" # Type-A Port 1 + register "usb2_ports[6]" = "USB2_PORT_FLEX(OC_SKIP)" # Camera + register "usb2_ports[8]" = "USB2_PORT_MID(OC1)" # Type-A Port 2 - register "usb3_ports[0]" = "USB3_PORT_DEFAULT" # Type-C Port (board) - register "usb3_ports[1]" = "USB3_PORT_DEFAULT" # Type-C Port (flex) - register "usb3_ports[2]" = "USB3_PORT_DEFAULT" # Type-A Port 1 - register "usb3_ports[3]" = "USB3_PORT_DEFAULT" # Type-A Port 2 + register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)" # Type-C Port (board) + register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC3)" # Type-C Port (flex) + register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC0)" # Type-A Port 1 + register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC1)" # Type-A Port 2 register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V diff --git a/src/mainboard/google/lars/devicetree.cb b/src/mainboard/google/lars/devicetree.cb index dab95de41a..4291e5f851 100644 --- a/src/mainboard/google/lars/devicetree.cb +++ b/src/mainboard/google/lars/devicetree.cb @@ -148,17 +148,17 @@ chip soc/intel/skylake # RP 1 uses SRCCLKREQ1# register "PcieRpClkReqNumber[0]" = "1" - register "usb2_ports[0]" = "USB2_PORT_TYPE_C" # Type-C Port 1 - register "usb2_ports[1]" = "USB2_PORT_FLEX" # Camera - register "usb2_ports[2]" = "USB2_PORT_MID" # Bluetooth - register "usb2_ports[4]" = "USB2_PORT_MID" # Type-A Port (card) - register "usb2_ports[5]" = "USB2_PORT_MID" # SD - register "usb2_ports[8]" = "USB2_PORT_LONG" # Type-A Port (board) + register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)" # Type-C Port 1 + register "usb2_ports[1]" = "USB2_PORT_FLEX(OC_SKIP)" # Camera + register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth + register "usb2_ports[4]" = "USB2_PORT_MID(OC2)" # Type-A Port (card) + register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # SD + register "usb2_ports[8]" = "USB2_PORT_LONG(OC3)" # Type-A Port (board) - register "usb3_ports[0]" = "USB3_PORT_DEFAULT" # Type-C Port 1 - register "usb3_ports[1]" = "USB3_PORT_DEFAULT" # SD - register "usb3_ports[2]" = "USB3_PORT_DEFAULT" # Type-A Port (card) - register "usb3_ports[3]" = "USB3_PORT_DEFAULT" # Type-A Port (board) + register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # Type-C Port 1 + register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # SD + register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Port (card) + register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC3)" # Type-A Port (board) register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V diff --git a/src/mainboard/intel/kblrvp/devicetree.cb b/src/mainboard/intel/kblrvp/devicetree.cb index 11d5062664..c2dde4f526 100644 --- a/src/mainboard/intel/kblrvp/devicetree.cb +++ b/src/mainboard/intel/kblrvp/devicetree.cb @@ -168,23 +168,23 @@ chip soc/intel/skylake register "PcieRpClkReqNumber[9]" = "4" # USB 2.0 Enable all ports - register "usb2_ports[0]" = "USB2_PORT_MAX" # TYPE-A Port - register "usb2_ports[1]" = "USB2_PORT_MAX" # TYPE-A Port - register "usb2_ports[2]" = "USB2_PORT_MAX" # Bluetooth - register "usb2_ports[4]" = "USB2_PORT_MAX" # Type-A Port - register "usb2_ports[5]" = "USB2_PORT_MAX" # TYPE-A Port - register "usb2_ports[6]" = "USB2_PORT_MAX" # TYPE-A Port - register "usb2_ports[7]" = "USB2_PORT_MAX" # TYPE-A Port - register "usb2_ports[8]" = "USB2_PORT_MAX" # TYPE-A Port - register "usb2_ports[9]" = "USB2_PORT_MAX" # TYPE-A Port - register "usb2_ports[10]" = "USB2_PORT_MAX" # TYPE-A Port - register "usb2_ports[11]" = "USB2_PORT_MAX" # TYPE-A Port + register "usb2_ports[0]" = "USB2_PORT_MAX(OC0)" # TYPE-A Port + register "usb2_ports[1]" = "USB2_PORT_MAX(OC2)" # TYPE-A Port + register "usb2_ports[2]" = "USB2_PORT_MAX(OC_SKIP)" # Bluetooth + register "usb2_ports[4]" = "USB2_PORT_MAX(OC_SKIP)" # Type-A Port + register "usb2_ports[5]" = "USB2_PORT_MAX(OC2)" # TYPE-A Port + register "usb2_ports[6]" = "USB2_PORT_MAX(OC_SKIP)" # TYPE-A Port + register "usb2_ports[7]" = "USB2_PORT_MAX(OC_SKIP)" # TYPE-A Port + register "usb2_ports[8]" = "USB2_PORT_MAX(OC_SKIP)" # TYPE-A Port + register "usb2_ports[9]" = "USB2_PORT_MAX(OC1)" # TYPE-A Port + register "usb2_ports[10]" = "USB2_PORT_MAX(OC_SKIP)" # TYPE-A Port + register "usb2_ports[11]" = "USB2_PORT_MAX(OC_SKIP)" # TYPE-A Port # USB 3.0 Enable Port 1-4. Port 5 & 6 Disabled - register "usb3_ports[0]" = "USB3_PORT_DEFAULT" # TYPE-A Port - register "usb3_ports[1]" = "USB3_PORT_DEFAULT" # TYPE-A Port - register "usb3_ports[2]" = "USB3_PORT_DEFAULT" # TYPE-A Port - register "usb3_ports[3]" = "USB3_PORT_DEFAULT" # TYPE-A Port + register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # TYPE-A Port + register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # TYPE-A Port + register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # TYPE-A Port + register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC1)" # TYPE-A Port register "usb3_ports[4]" = "USB3_PORT_EMPTY" # Disabled register "usb3_ports[5]" = "USB3_PORT_EMPTY" # Disabled diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb index 3cdaa0670c..6a6c2ce0e4 100644 --- a/src/mainboard/intel/kunimitsu/devicetree.cb +++ b/src/mainboard/intel/kunimitsu/devicetree.cb @@ -152,17 +152,17 @@ chip soc/intel/skylake register "PcieRpClkReqNumber[0]" = "1" register "PcieRpClkReqNumber[4]" = "2" - register "usb2_ports[0]" = "USB2_PORT_TYPE_C" # Type-C Port 1 - register "usb2_ports[1]" = "USB2_PORT_TYPE_C" # Type-C Port 2 - register "usb2_ports[2]" = "USB2_PORT_MID" # Bluetooth - register "usb2_ports[4]" = "USB2_PORT_MID" # Type-A Port (card) - register "usb2_ports[6]" = "USB2_PORT_FLEX" # Camera - register "usb2_ports[8]" = "USB2_PORT_LONG" # Type-A Port (board) + register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)" # Type-C Port 1 + register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC1)" # Type-C Port 2 + register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth + register "usb2_ports[4]" = "USB2_PORT_MID(OC2)" # Type-A Port (card) + register "usb2_ports[6]" = "USB2_PORT_FLEX(OC_SKIP)" # Camera + register "usb2_ports[8]" = "USB2_PORT_LONG(OC3)" # Type-A Port (board) - register "usb3_ports[0]" = "USB3_PORT_DEFAULT" # Type-C Port 1 - register "usb3_ports[1]" = "USB3_PORT_DEFAULT" # Type-C Port 2 - register "usb3_ports[2]" = "USB3_PORT_DEFAULT" # Type-A Port (card) - register "usb3_ports[3]" = "USB3_PORT_DEFAULT" # Type-A Port (board) + register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # Type-C Port 1 + register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC1)" # Type-C Port 2 + register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Port (card) + register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC3)" # Type-A Port (board) register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V |