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-rw-r--r--src/mainboard/google/rush_ryu/mainboard.c39
1 files changed, 27 insertions, 12 deletions
diff --git a/src/mainboard/google/rush_ryu/mainboard.c b/src/mainboard/google/rush_ryu/mainboard.c
index 2955958d3d..8efd0a0de7 100644
--- a/src/mainboard/google/rush_ryu/mainboard.c
+++ b/src/mainboard/google/rush_ryu/mainboard.c
@@ -173,6 +173,21 @@ static int enable_lcd_vdd(void)
return 0;
}
+static const struct pad_config i2s1_pad[] = {
+ /* I2S1 */
+ PAD_CFG_SFIO(DAP2_SCLK, PINMUX_INPUT_ENABLE, I2S1),
+ PAD_CFG_SFIO(DAP2_FS, PINMUX_INPUT_ENABLE, I2S1),
+ PAD_CFG_SFIO(DAP2_DOUT, PINMUX_INPUT_ENABLE, I2S1),
+ PAD_CFG_SFIO(DAP2_DIN, PINMUX_INPUT_ENABLE | PINMUX_TRISTATE, I2S1),
+ /* codec MCLK via EXTPERIPH1 */
+ PAD_CFG_SFIO(DAP_MCLK1, PINMUX_PULL_NONE, EXTPERIPH1),
+};
+
+static const struct funit_cfg audio_funit[] = {
+ /* We need 1.5MHz for I2S1. So we use CLK_M */
+ FUNIT_CFG(I2S1, CLK_M, 1500, i2s1_pad, ARRAY_SIZE(i2s1_pad)),
+};
+
static int configure_display_blocks(void)
{
/* set and enable panel related vdd */
@@ -188,24 +203,24 @@ static int configure_display_blocks(void)
/* Audio init: clocks and enables/resets */
static void setup_audio(void)
{
- /* External peripheral 1: audio codec (RT5677) using 12MHz CLK1 */
+ /*
+ * External peripheral 1: audio codec (RT5677) uses 12MHz CLK1
+ * NOTE: We can't use a funits struct/call here because EXTPERIPH1/2/3
+ * don't have BASE regs or CAR RST/ENA bits. Also, the mux setting for
+ * EXTPERIPH1/DAP_MCLK1 is rolled into the I2S1 padcfg.
+ */
clock_configure_source(extperiph1, CLK_M, 12000);
- /*
- * We need 1.5MHz for I2S1. So, we use CLK_M. CLK_DIVIDER macro
- * returns a divisor (0xe) a little bit off from the ideal value (0xd),
- * but it's good enough for beeps.
- */
- clock_configure_source(i2s1, CLK_M, 1500);
+ soc_configure_funits(audio_funit, ARRAY_SIZE(audio_funit));
clock_external_output(1); /* For external RT5677 audio codec. */
/*
- * Confirmed by NVIDIA hardware team, we need to take ALL audio devices
- * connected to AHUB (AUDIO, APBIF, I2S, DAM, AMX, ADX, SPDIF, AFC) out
- * of reset and clock-enabled, otherwise reading AHUB devices (in our
- * case, I2S/APBIF/AUDIO<XBAR>) will hang.
- */
+ * Confirmed by NVIDIA hardware team, we need to take ALL audio devices
+ * connected to AHUB (AUDIO, APBIF, I2S, DAM, AMX, ADX, SPDIF, AFC) out
+ * of reset and clock-enabled, otherwise reading AHUB devices (in our
+ * case, I2S/APBIF/AUDIO<XBAR>) will hang.
+ */
clock_enable_audio();
}