diff options
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/asrock/b75pro3-m/romstage.c | 1 | ||||
-rw-r--r-- | src/mainboard/compulab/intense_pc/romstage.c | 1 | ||||
-rw-r--r-- | src/mainboard/google/link/romstage.c | 1 | ||||
-rw-r--r-- | src/mainboard/intel/dcp847ske/early_southbridge.c | 1 | ||||
-rw-r--r-- | src/mainboard/intel/dcp847ske/romstage.c | 1 |
5 files changed, 5 insertions, 0 deletions
diff --git a/src/mainboard/asrock/b75pro3-m/romstage.c b/src/mainboard/asrock/b75pro3-m/romstage.c index 51991248af..cbd26a52ac 100644 --- a/src/mainboard/asrock/b75pro3-m/romstage.c +++ b/src/mainboard/asrock/b75pro3-m/romstage.c @@ -17,6 +17,7 @@ #include <device/pci_ops.h> #include <device/pnp_ops.h> #include <northbridge/intel/sandybridge/raminit_native.h> +#include <southbridge/intel/bd82x6x/pch.h> #include <superio/nuvoton/nct6776/nct6776.h> #include <superio/nuvoton/common/nuvoton.h> diff --git a/src/mainboard/compulab/intense_pc/romstage.c b/src/mainboard/compulab/intense_pc/romstage.c index dbd28c8aff..6d0b3af8c0 100644 --- a/src/mainboard/compulab/intense_pc/romstage.c +++ b/src/mainboard/compulab/intense_pc/romstage.c @@ -18,6 +18,7 @@ #include <device/pci_ops.h> #include <northbridge/intel/sandybridge/raminit_native.h> #include <superio/smsc/sio1007/chip.h> +#include <southbridge/intel/bd82x6x/pch.h> #define SIO_PORT 0x164e diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c index 66a503d0b1..8da13080b3 100644 --- a/src/mainboard/google/link/romstage.c +++ b/src/mainboard/google/link/romstage.c @@ -25,6 +25,7 @@ #include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/raminit.h> #include <northbridge/intel/sandybridge/raminit_native.h> +#include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/gpio.h> #include "ec/google/chromeec/ec.h" #include <cbfs.h> diff --git a/src/mainboard/intel/dcp847ske/early_southbridge.c b/src/mainboard/intel/dcp847ske/early_southbridge.c index 510073540f..39aeb8f6e2 100644 --- a/src/mainboard/intel/dcp847ske/early_southbridge.c +++ b/src/mainboard/intel/dcp847ske/early_southbridge.c @@ -23,6 +23,7 @@ #include <device/pci_def.h> #include <console/console.h> #include <northbridge/intel/sandybridge/raminit_native.h> +#include <southbridge/intel/bd82x6x/pch.h> #include "superio.h" #include "thermal.h" diff --git a/src/mainboard/intel/dcp847ske/romstage.c b/src/mainboard/intel/dcp847ske/romstage.c index 24ec912a4c..235ad228f8 100644 --- a/src/mainboard/intel/dcp847ske/romstage.c +++ b/src/mainboard/intel/dcp847ske/romstage.c @@ -23,6 +23,7 @@ #else #include <northbridge/intel/sandybridge/raminit.h> #endif +#include <southbridge/intel/bd82x6x/pch.h> #if !CONFIG(USE_NATIVE_RAMINIT) void mainboard_fill_pei_data(struct pei_data *pei_data) |