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-rw-r--r--src/mainboard/asus/p8z77-m_pro/early_init.c6
-rw-r--r--src/mainboard/dell/optiplex_9010/early_init.c4
-rw-r--r--src/mainboard/google/butterfly/early_init.c6
-rw-r--r--src/mainboard/google/link/early_init.c6
-rw-r--r--src/mainboard/google/parrot/early_init.c6
-rw-r--r--src/mainboard/google/stout/early_init.c6
-rw-r--r--src/mainboard/intel/dcp847ske/romstage.c6
-rw-r--r--src/mainboard/intel/emeraldlake2/early_init.c6
-rw-r--r--src/mainboard/kontron/ktqm77/early_init.c6
-rw-r--r--src/mainboard/lenovo/x220/early_init.c6
-rw-r--r--src/mainboard/roda/rv11/variants/rv11/early_init.c6
-rw-r--r--src/mainboard/roda/rv11/variants/rw11/early_init.c6
-rw-r--r--src/mainboard/samsung/lumpy/early_init.c6
-rw-r--r--src/mainboard/samsung/stumpy/early_init.c6
14 files changed, 41 insertions, 41 deletions
diff --git a/src/mainboard/asus/p8z77-m_pro/early_init.c b/src/mainboard/asus/p8z77-m_pro/early_init.c
index 81eb6f474c..eadf0a93ae 100644
--- a/src/mainboard/asus/p8z77-m_pro/early_init.c
+++ b/src/mainboard/asus/p8z77-m_pro/early_init.c
@@ -85,9 +85,9 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
struct pei_data pd = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
- .epbar = DEFAULT_EPBAR,
+ .mchbar = CONFIG_FIXED_MCHBAR_MMIO_BASE,
+ .dmibar = CONFIG_FIXED_DMIBAR_MMIO_BASE,
+ .epbar = CONFIG_FIXED_EPBAR_MMIO_BASE,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
diff --git a/src/mainboard/dell/optiplex_9010/early_init.c b/src/mainboard/dell/optiplex_9010/early_init.c
index e96ee34aa4..0b6334d72a 100644
--- a/src/mainboard/dell/optiplex_9010/early_init.c
+++ b/src/mainboard/dell/optiplex_9010/early_init.c
@@ -32,8 +32,8 @@ void bootblock_mainboard_early_init(void)
* FIXME: the board gets stuck in reset loop in
* mainboard_romstage_entry. Avoid that by clearing SSKPD
*/
- pci_write_config32(HOST_BRIDGE, MCHBAR, DEFAULT_MCHBAR | 1);
- pci_write_config32(HOST_BRIDGE, MCHBAR + 4, (0LL + DEFAULT_MCHBAR) >> 32);
+ pci_write_config32(HOST_BRIDGE, MCHBAR, CONFIG_FIXED_MCHBAR_MMIO_BASE | 1);
+ pci_write_config32(HOST_BRIDGE, MCHBAR + 4, 0);
MCHBAR16(SSKPD_HI) = 0;
sch5545_early_init(0x2e);
diff --git a/src/mainboard/google/butterfly/early_init.c b/src/mainboard/google/butterfly/early_init.c
index c439fe2e73..d213f7de49 100644
--- a/src/mainboard/google/butterfly/early_init.c
+++ b/src/mainboard/google/butterfly/early_init.c
@@ -76,9 +76,9 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
{
struct pei_data pei_data_template = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
- .epbar = DEFAULT_EPBAR,
+ .mchbar = CONFIG_FIXED_MCHBAR_MMIO_BASE,
+ .dmibar = CONFIG_FIXED_DMIBAR_MMIO_BASE,
+ .epbar = CONFIG_FIXED_EPBAR_MMIO_BASE,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
diff --git a/src/mainboard/google/link/early_init.c b/src/mainboard/google/link/early_init.c
index de8f749770..4f710c6904 100644
--- a/src/mainboard/google/link/early_init.c
+++ b/src/mainboard/google/link/early_init.c
@@ -85,9 +85,9 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
{
struct pei_data pei_data_template = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
- .epbar = DEFAULT_EPBAR,
+ .mchbar = CONFIG_FIXED_MCHBAR_MMIO_BASE,
+ .dmibar = CONFIG_FIXED_DMIBAR_MMIO_BASE,
+ .epbar = CONFIG_FIXED_EPBAR_MMIO_BASE,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
diff --git a/src/mainboard/google/parrot/early_init.c b/src/mainboard/google/parrot/early_init.c
index b7ed73c6cf..ab8a23f95b 100644
--- a/src/mainboard/google/parrot/early_init.c
+++ b/src/mainboard/google/parrot/early_init.c
@@ -54,9 +54,9 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
{
struct pei_data pei_data_template = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
- .epbar = DEFAULT_EPBAR,
+ .mchbar = CONFIG_FIXED_MCHBAR_MMIO_BASE,
+ .dmibar = CONFIG_FIXED_DMIBAR_MMIO_BASE,
+ .epbar = CONFIG_FIXED_EPBAR_MMIO_BASE,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
diff --git a/src/mainboard/google/stout/early_init.c b/src/mainboard/google/stout/early_init.c
index f2f21bc0d2..84ca487d09 100644
--- a/src/mainboard/google/stout/early_init.c
+++ b/src/mainboard/google/stout/early_init.c
@@ -91,9 +91,9 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
{
struct pei_data pei_data_template = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
- .epbar = DEFAULT_EPBAR,
+ .mchbar = CONFIG_FIXED_MCHBAR_MMIO_BASE,
+ .dmibar = CONFIG_FIXED_DMIBAR_MMIO_BASE,
+ .epbar = CONFIG_FIXED_EPBAR_MMIO_BASE,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
diff --git a/src/mainboard/intel/dcp847ske/romstage.c b/src/mainboard/intel/dcp847ske/romstage.c
index 391d1f23b2..d52ea3c93d 100644
--- a/src/mainboard/intel/dcp847ske/romstage.c
+++ b/src/mainboard/intel/dcp847ske/romstage.c
@@ -14,9 +14,9 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
{
struct pei_data pei_data_template = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
- .epbar = DEFAULT_EPBAR,
+ .mchbar = CONFIG_FIXED_MCHBAR_MMIO_BASE,
+ .dmibar = CONFIG_FIXED_DMIBAR_MMIO_BASE,
+ .epbar = CONFIG_FIXED_EPBAR_MMIO_BASE,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
diff --git a/src/mainboard/intel/emeraldlake2/early_init.c b/src/mainboard/intel/emeraldlake2/early_init.c
index a2aaf33bb0..e7cd7f95e5 100644
--- a/src/mainboard/intel/emeraldlake2/early_init.c
+++ b/src/mainboard/intel/emeraldlake2/early_init.c
@@ -51,9 +51,9 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
{
struct pei_data pei_data_template = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
- .epbar = DEFAULT_EPBAR,
+ .mchbar = CONFIG_FIXED_MCHBAR_MMIO_BASE,
+ .dmibar = CONFIG_FIXED_DMIBAR_MMIO_BASE,
+ .epbar = CONFIG_FIXED_EPBAR_MMIO_BASE,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
diff --git a/src/mainboard/kontron/ktqm77/early_init.c b/src/mainboard/kontron/ktqm77/early_init.c
index d1aa9d5dc8..fac3da9117 100644
--- a/src/mainboard/kontron/ktqm77/early_init.c
+++ b/src/mainboard/kontron/ktqm77/early_init.c
@@ -56,9 +56,9 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
{
struct pei_data pei_data_template = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
- .epbar = DEFAULT_EPBAR,
+ .mchbar = CONFIG_FIXED_MCHBAR_MMIO_BASE,
+ .dmibar = CONFIG_FIXED_DMIBAR_MMIO_BASE,
+ .epbar = CONFIG_FIXED_EPBAR_MMIO_BASE,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
diff --git a/src/mainboard/lenovo/x220/early_init.c b/src/mainboard/lenovo/x220/early_init.c
index bb120bfa0e..eb5bb6ecc9 100644
--- a/src/mainboard/lenovo/x220/early_init.c
+++ b/src/mainboard/lenovo/x220/early_init.c
@@ -12,9 +12,9 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
{
struct pei_data pei_data_template = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
- .epbar = DEFAULT_EPBAR,
+ .mchbar = CONFIG_FIXED_MCHBAR_MMIO_BASE,
+ .dmibar = CONFIG_FIXED_DMIBAR_MMIO_BASE,
+ .epbar = CONFIG_FIXED_EPBAR_MMIO_BASE,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
diff --git a/src/mainboard/roda/rv11/variants/rv11/early_init.c b/src/mainboard/roda/rv11/variants/rv11/early_init.c
index 5b55873eb1..ce3b0c63b3 100644
--- a/src/mainboard/roda/rv11/variants/rv11/early_init.c
+++ b/src/mainboard/roda/rv11/variants/rv11/early_init.c
@@ -10,9 +10,9 @@ void mainboard_fill_pei_data(struct pei_data *const pei_data)
{
const struct pei_data pei_data_template = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
- .epbar = DEFAULT_EPBAR,
+ .mchbar = CONFIG_FIXED_MCHBAR_MMIO_BASE,
+ .dmibar = CONFIG_FIXED_DMIBAR_MMIO_BASE,
+ .epbar = CONFIG_FIXED_EPBAR_MMIO_BASE,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
diff --git a/src/mainboard/roda/rv11/variants/rw11/early_init.c b/src/mainboard/roda/rv11/variants/rw11/early_init.c
index 7076eb7358..9455987298 100644
--- a/src/mainboard/roda/rv11/variants/rw11/early_init.c
+++ b/src/mainboard/roda/rv11/variants/rw11/early_init.c
@@ -40,9 +40,9 @@ void mainboard_fill_pei_data(struct pei_data *const pei_data)
{
const struct pei_data pei_data_template = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
- .epbar = DEFAULT_EPBAR,
+ .mchbar = CONFIG_FIXED_MCHBAR_MMIO_BASE,
+ .dmibar = CONFIG_FIXED_DMIBAR_MMIO_BASE,
+ .epbar = CONFIG_FIXED_EPBAR_MMIO_BASE,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
diff --git a/src/mainboard/samsung/lumpy/early_init.c b/src/mainboard/samsung/lumpy/early_init.c
index 90a176471a..276a2c1732 100644
--- a/src/mainboard/samsung/lumpy/early_init.c
+++ b/src/mainboard/samsung/lumpy/early_init.c
@@ -116,9 +116,9 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
{
struct pei_data pei_data_template = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
- .epbar = DEFAULT_EPBAR,
+ .mchbar = CONFIG_FIXED_MCHBAR_MMIO_BASE,
+ .dmibar = CONFIG_FIXED_DMIBAR_MMIO_BASE,
+ .epbar = CONFIG_FIXED_EPBAR_MMIO_BASE,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
diff --git a/src/mainboard/samsung/stumpy/early_init.c b/src/mainboard/samsung/stumpy/early_init.c
index 7d4a9a4411..858313f0c6 100644
--- a/src/mainboard/samsung/stumpy/early_init.c
+++ b/src/mainboard/samsung/stumpy/early_init.c
@@ -101,9 +101,9 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
{
struct pei_data pei_data_template = {
.pei_version = PEI_VERSION,
- .mchbar = DEFAULT_MCHBAR,
- .dmibar = DEFAULT_DMIBAR,
- .epbar = DEFAULT_EPBAR,
+ .mchbar = CONFIG_FIXED_MCHBAR_MMIO_BASE,
+ .dmibar = CONFIG_FIXED_DMIBAR_MMIO_BASE,
+ .epbar = CONFIG_FIXED_EPBAR_MMIO_BASE,
.pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
generated by cgit v1.2.3 (git 2.39.1) at 2024-06-28 21:06:26 +0000