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-rw-r--r--src/mainboard/amd/gardenia/BiosCallOuts.c73
-rw-r--r--src/mainboard/amd/gardenia/bootblock/BiosCallOuts.c23
-rw-r--r--src/mainboard/google/kahlee/BiosCallOuts.c77
-rw-r--r--src/mainboard/google/kahlee/bootblock/BiosCallOuts.c24
4 files changed, 10 insertions, 187 deletions
diff --git a/src/mainboard/amd/gardenia/BiosCallOuts.c b/src/mainboard/amd/gardenia/BiosCallOuts.c
index c947b0cb51..e1e5437da7 100644
--- a/src/mainboard/amd/gardenia/BiosCallOuts.c
+++ b/src/mainboard/amd/gardenia/BiosCallOuts.c
@@ -27,7 +27,7 @@
* software switches the I2C address. AMD recommends using IMC
* to control fans, instead of HWM.
*/
-static void oem_fan_control(FCH_DATA_BLOCK *FchParams)
+void oem_fan_control(FCH_DATA_BLOCK *FchParams)
{
/* Enable IMC fan control. the recommand way */
imc_reg_init();
@@ -43,76 +43,7 @@ static void oem_fan_control(FCH_DATA_BLOCK *FchParams)
memset(&FchParams->Imc.EcStruct, 0, sizeof(FCH_EC));
}
-static AGESA_STATUS fch_initenv(UINT32 Func, UINTN FchData, VOID *ConfigPtr)
+void platform_FchParams_env(FCH_DATA_BLOCK *FchParams_env)
{
- AMD_CONFIG_PARAMS *StdHeader = ConfigPtr;
- if (StdHeader->Func == AMD_INIT_ENV) {
- FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
- printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
- if (IS_ENABLED(CONFIG_STONEYRIDGE_IMC_FWM))
- oem_fan_control(FchParams_env);
-
- /* XHCI configuration */
- if (IS_ENABLED(CONFIG_STONEYRIDGE_XHCI_ENABLE))
- FchParams_env->Usb.Xhci0Enable = TRUE;
- else
- FchParams_env->Usb.Xhci0Enable = FALSE;
- FchParams_env->Usb.Xhci1Enable = FALSE;
- /* 8: If USB3 port is unremoveable. */
- FchParams_env->Usb.USB30PortInit = 8;
-
- /* SATA configuration */
- FchParams_env->Sata.SataClass = CONFIG_STONEYRIDGE_SATA_MODE;
- switch ((SATA_CLASS)CONFIG_STONEYRIDGE_SATA_MODE) {
- case SataRaid:
- case SataAhci:
- case SataAhci7804:
- case SataLegacyIde:
- FchParams_env->Sata.SataIdeMode = FALSE;
- break;
- case SataIde2Ahci:
- case SataIde2Ahci7804:
- default: /* SataNativeIde */
- FchParams_env->Sata.SataIdeMode = TRUE;
- break;
- }
- printk(BIOS_DEBUG, "Done\n");
- }
-
- return AGESA_SUCCESS;
}
-
-const BIOS_CALLOUT_STRUCT BiosCallouts[] = {
- /* Required callouts */
- {AGESA_ALLOCATE_BUFFER, agesa_AllocateBuffer },
- {AGESA_DEALLOCATE_BUFFER, agesa_DeallocateBuffer },
- {AGESA_DO_RESET, agesa_Reset },
- {AGESA_LOCATE_BUFFER, agesa_LocateBuffer },
- {AGESA_READ_SPD, agesa_ReadSpd },
- {AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },
- {AGESA_RUNFUNC_ON_ALL_APS, agesa_RunFcnOnAllAps },
- {AMD_LATE_RUN_AP_TASK, agesa_LateRunApTask },
- {AGESA_GNB_PCIE_SLOT_RESET, agesa_PcieSlotResetControl },
- {AGESA_WAIT_FOR_ALL_APS, agesa_WaitForAllApsFinished },
- {AGESA_IDLE_AN_AP, agesa_IdleAnAp },
-
- /* Optional callouts */
- {AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData },
- //AgesaHeapRebase - Hook ID?
- {AGESA_HOOKBEFORE_DRAM_INIT, agesa_NoopUnsupported },
- {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopUnsupported },
- {AGESA_EXTERNAL_2D_TRAIN_VREF_CHANGE, agesa_NoopUnsupported },
- {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopUnsupported },
- {AGESA_GNB_GFX_GET_VBIOS_IMAGE, agesa_GfxGetVbiosImage },
- {AGESA_FCH_OEM_CALLOUT, fch_initenv },
- {AGESA_EXTERNAL_VOLTAGE_ADJUST, agesa_NoopUnsupported },
- {AGESA_GNB_PCIE_CLK_REQ, agesa_NoopUnsupported },
-
- /* Deprecated */
- {AGESA_HOOKBEFORE_DRAM_INIT_RECOVERY, agesa_NoopUnsupported},
- {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported },
-
-};
-
-const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts);
diff --git a/src/mainboard/amd/gardenia/bootblock/BiosCallOuts.c b/src/mainboard/amd/gardenia/bootblock/BiosCallOuts.c
index 1b7a34134c..6aebe4f988 100644
--- a/src/mainboard/amd/gardenia/bootblock/BiosCallOuts.c
+++ b/src/mainboard/amd/gardenia/bootblock/BiosCallOuts.c
@@ -45,26 +45,7 @@ static const GPIO_CONTROL oem_gardenia_gpio[] = {
{-1}
};
-static AGESA_STATUS fch_initreset(UINT32 Func, UINTN FchData, VOID *ConfigPtr)
+void platform_FchParams_reset(FCH_RESET_DATA_BLOCK *FchParams_reset)
{
- AMD_CONFIG_PARAMS *StdHeader = ConfigPtr;
-
- if (StdHeader->Func == AMD_INIT_RESET) {
- FCH_RESET_DATA_BLOCK *FchParams_reset;
- FchParams_reset = (FCH_RESET_DATA_BLOCK *)FchData;
- printk(BIOS_DEBUG, "Fch OEM config in INIT RESET ");
- FchParams_reset->FchReset.SataEnable = sb_sata_enable();
- FchParams_reset->FchReset.IdeEnable = sb_ide_enable();
- FchParams_reset->EarlyOemGpioTable = oem_gardenia_gpio;
- printk(BIOS_DEBUG, "Done\n");
- }
-
- return AGESA_SUCCESS;
+ FchParams_reset->EarlyOemGpioTable = oem_gardenia_gpio;
}
-
-const BIOS_CALLOUT_STRUCT BiosCallouts[] = {
- {AGESA_FCH_OEM_CALLOUT, fch_initreset },
- {AGESA_GNB_PCIE_SLOT_RESET, agesa_PcieSlotResetControl }
-};
-
-const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts);
diff --git a/src/mainboard/google/kahlee/BiosCallOuts.c b/src/mainboard/google/kahlee/BiosCallOuts.c
index 2e57166b69..82f13d6e66 100644
--- a/src/mainboard/google/kahlee/BiosCallOuts.c
+++ b/src/mainboard/google/kahlee/BiosCallOuts.c
@@ -21,79 +21,10 @@
extern const GPIO_CONTROL oem_kahlee_gpio[];
-static AGESA_STATUS fch_initenv(UINT32 Func, UINTN FchData, VOID *ConfigPtr)
+void platform_FchParams_env(FCH_DATA_BLOCK *FchParams_env)
{
- AMD_CONFIG_PARAMS *StdHeader = ConfigPtr;
+ FchParams_env->PostOemGpioTable = oem_kahlee_gpio;
- if (StdHeader->Func == AMD_INIT_ENV) {
- FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
- printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
- FchParams_env->PostOemGpioTable = oem_kahlee_gpio;
-
- /* XHCI configuration */
- if (IS_ENABLED(CONFIG_STONEYRIDGE_XHCI_ENABLE))
- FchParams_env->Usb.Xhci0Enable = TRUE;
- else
- FchParams_env->Usb.Xhci0Enable = FALSE;
- FchParams_env->Usb.Xhci1Enable = FALSE;
- /* 8: If USB3 port is unremoveable. */
- FchParams_env->Usb.USB30PortInit = 8;
-
- /* SATA configuration */
- FchParams_env->Sata.SataClass = CONFIG_STONEYRIDGE_SATA_MODE;
- switch ((SATA_CLASS)CONFIG_STONEYRIDGE_SATA_MODE) {
- case SataRaid:
- case SataAhci:
- case SataAhci7804:
- case SataLegacyIde:
- FchParams_env->Sata.SataIdeMode = FALSE;
- break;
- case SataIde2Ahci:
- case SataIde2Ahci7804:
- default: /* SataNativeIde */
- FchParams_env->Sata.SataIdeMode = TRUE;
- break;
- }
-
- /* SDHCI/MMC configuration */
- FchParams_env->Sd.SdSlotType = 1; /* eMMC */
-
- printk(BIOS_DEBUG, "Done\n");
- }
-
- return AGESA_SUCCESS;
+ /* SDHCI/MMC configuration */
+ FchParams_env->Sd.SdSlotType = 1; // EMMC
}
-
-const BIOS_CALLOUT_STRUCT BiosCallouts[] = {
- /* Required callouts */
- {AGESA_ALLOCATE_BUFFER, agesa_AllocateBuffer },
- {AGESA_DEALLOCATE_BUFFER, agesa_DeallocateBuffer },
- {AGESA_DO_RESET, agesa_Reset },
- {AGESA_LOCATE_BUFFER, agesa_LocateBuffer },
- {AGESA_READ_SPD, agesa_ReadSpd },
- {AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },
- {AGESA_RUNFUNC_ON_ALL_APS, agesa_RunFcnOnAllAps },
- {AMD_LATE_RUN_AP_TASK, agesa_LateRunApTask },
- {AGESA_GNB_PCIE_SLOT_RESET, agesa_PcieSlotResetControl },
- {AGESA_WAIT_FOR_ALL_APS, agesa_WaitForAllApsFinished },
- {AGESA_IDLE_AN_AP, agesa_IdleAnAp },
-
- /* Optional callouts */
- {AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData },
- //AgesaHeapRebase - Hook ID?
- {AGESA_HOOKBEFORE_DRAM_INIT, agesa_NoopUnsupported },
- {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopUnsupported },
- {AGESA_EXTERNAL_2D_TRAIN_VREF_CHANGE, agesa_NoopUnsupported },
- {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopUnsupported },
- {AGESA_GNB_GFX_GET_VBIOS_IMAGE, agesa_GfxGetVbiosImage },
- {AGESA_FCH_OEM_CALLOUT, fch_initenv },
- {AGESA_EXTERNAL_VOLTAGE_ADJUST, agesa_NoopUnsupported },
- {AGESA_GNB_PCIE_CLK_REQ, agesa_NoopUnsupported },
-
- /* Deprecated */
- {AGESA_HOOKBEFORE_DRAM_INIT_RECOVERY, agesa_NoopUnsupported},
- {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported },
-
-};
-
-const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts);
diff --git a/src/mainboard/google/kahlee/bootblock/BiosCallOuts.c b/src/mainboard/google/kahlee/bootblock/BiosCallOuts.c
index 42cc7585f4..73d129594d 100644
--- a/src/mainboard/google/kahlee/bootblock/BiosCallOuts.c
+++ b/src/mainboard/google/kahlee/bootblock/BiosCallOuts.c
@@ -21,27 +21,7 @@
extern const GPIO_CONTROL oem_kahlee_gpio[];
-static AGESA_STATUS fch_initreset(UINT32 Func, UINTN FchData, VOID *ConfigPtr)
+void platform_FchParams_reset(FCH_RESET_DATA_BLOCK *FchParams_reset)
{
- AMD_CONFIG_PARAMS *StdHeader = ConfigPtr;
-
- if (StdHeader->Func == AMD_INIT_RESET) {
- FCH_RESET_DATA_BLOCK *FchParams_reset;
- FchParams_reset = (FCH_RESET_DATA_BLOCK *)FchData;
- printk(BIOS_DEBUG, "Fch OEM config in INIT RESET ");
- FchParams_reset->FchReset.SataEnable = sb_sata_enable();
- FchParams_reset->FchReset.IdeEnable = sb_ide_enable();
- FchParams_reset->EarlyOemGpioTable = oem_kahlee_gpio;
- printk(BIOS_DEBUG, "Done\n");
- }
-
- return AGESA_SUCCESS;
+ FchParams_reset->EarlyOemGpioTable = oem_kahlee_gpio;
}
-
-const BIOS_CALLOUT_STRUCT BiosCallouts[] = {
- {AGESA_DO_RESET, agesa_Reset },
- {AGESA_FCH_OEM_CALLOUT, fch_initreset },
- {AGESA_GNB_PCIE_SLOT_RESET, agesa_PcieSlotResetControl }
-};
-
-const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts);
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-05 04:44:26 +0000