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-rw-r--r--src/mainboard/google/octopus/variants/garg/overridetree.cb1
-rw-r--r--src/mainboard/google/octopus/variants/garg/variant.c19
2 files changed, 20 insertions, 0 deletions
diff --git a/src/mainboard/google/octopus/variants/garg/overridetree.cb b/src/mainboard/google/octopus/variants/garg/overridetree.cb
index f3c580d2c0..971d0d8b7c 100644
--- a/src/mainboard/google/octopus/variants/garg/overridetree.cb
+++ b/src/mainboard/google/octopus/variants/garg/overridetree.cb
@@ -192,4 +192,5 @@ chip soc/intel/apollolake
# Disable compliance mode
register "DisableComplianceMode" = "1"
+ register "disable_xhci_lfps_pm" = "0"
end
diff --git a/src/mainboard/google/octopus/variants/garg/variant.c b/src/mainboard/google/octopus/variants/garg/variant.c
index 7c84f2696b..0a6574d1a6 100644
--- a/src/mainboard/google/octopus/variants/garg/variant.c
+++ b/src/mainboard/google/octopus/variants/garg/variant.c
@@ -8,6 +8,7 @@
#include <delay.h>
#include <gpio.h>
#include <variant/sku.h>
+#include <soc/intel/apollolake/chip.h>
const char *mainboard_vbt_filename(void)
{
@@ -42,3 +43,21 @@ void variant_smi_sleep(u8 slp_typ)
return;
}
}
+
+void variant_update_devtree(struct device *dev)
+{
+ struct soc_intel_apollolake_config *cfg = NULL;
+
+ cfg = (struct soc_intel_apollolake_config *)dev->chip_info;
+
+ if (cfg != NULL && (cfg->disable_xhci_lfps_pm != 1)) {
+ switch (google_chromeec_get_board_sku()) {
+ case SKU_17_LTE:
+ case SKU_18_LTE_TS:
+ cfg->disable_xhci_lfps_pm = 1;
+ return;
+ default:
+ return;
+ }
+ }
+}