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-rw-r--r--src/mainboard/intel/jarrell/jarrell_fixups.c12
-rw-r--r--src/mainboard/intel/jarrell/reset.c9
-rw-r--r--src/mainboard/intel/xe7501devkit/reset.c2
3 files changed, 11 insertions, 12 deletions
diff --git a/src/mainboard/intel/jarrell/jarrell_fixups.c b/src/mainboard/intel/jarrell/jarrell_fixups.c
index fb00984b7e..7fb5a20dbb 100644
--- a/src/mainboard/intel/jarrell/jarrell_fixups.c
+++ b/src/mainboard/intel/jarrell/jarrell_fixups.c
@@ -4,7 +4,7 @@ static void mch_reset(void)
{
device_t dev;
unsigned long value, base;
- dev = pci_locate_device(PCI_ID(0x8086, 0x24d0), 0);
+ dev = pci_locate_device_on_bus(PCI_ID(0x8086, 0x24d0), 0);
if (dev != PCI_DEV_INVALID) {
/* I/O space is always enables */
@@ -30,8 +30,6 @@ static void mch_reset(void)
return;
}
-
-
static void mainboard_set_e7520_pll(unsigned bits)
{
uint16_t gpio_index;
@@ -64,14 +62,13 @@ static void mainboard_set_e7520_pll(unsigned bits)
outb((data & 0xeb) | ((bits&2)?0:1)<<4 | ((bits&1)?0:1)<<2, gpio_index + PC87427_GPDO_4);
/* reset */
print_debug("set_pllsel: settings adjusted, now resetting...\n");
- // hard_reset(); /* should activate a PCI_RST, which should reset MCH, but it doesn't seem to work ???? */
-// mch_reset();
+ // hard_reset(); /* should activate a PCI_RST, which should reset MCH, but it doesn't seem to work ???? */
+ // mch_reset();
full_reset();
}
return;
}
-
static void mainboard_set_e7520_leds(void)
{
uint8_t cnt;
@@ -118,6 +115,3 @@ static void mainboard_set_e7520_leds(void)
return;
}
-
-
-
diff --git a/src/mainboard/intel/jarrell/reset.c b/src/mainboard/intel/jarrell/reset.c
index fb379bd372..2ecfa48b8f 100644
--- a/src/mainboard/intel/jarrell/reset.c
+++ b/src/mainboard/intel/jarrell/reset.c
@@ -1,6 +1,6 @@
#include <arch/io.h>
-#include <reset.h>
#include <arch/romcc_io.h>
+#include <reset.h>
void soft_reset(void)
{
@@ -13,6 +13,11 @@ void hard_reset(void)
outb(0x06, 0xcf9);
}
+#ifndef __ROMCC__
+/* Used only board-internally by power_reset_check.c and jarell_fixups.c */
+void full_reset(void);
+#endif
+
void full_reset(void)
{
/* Enable power on after power fail... */
@@ -20,7 +25,7 @@ void full_reset(void)
byte = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xa4);
byte &= 0xfe;
pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xa4, byte);
+
outb(0x0e, 0xcf9);
}
-
diff --git a/src/mainboard/intel/xe7501devkit/reset.c b/src/mainboard/intel/xe7501devkit/reset.c
index 7abc9e5318..106920acbe 100644
--- a/src/mainboard/intel/xe7501devkit/reset.c
+++ b/src/mainboard/intel/xe7501devkit/reset.c
@@ -1,6 +1,6 @@
#include <reset.h>
-void i82801cx_hard_reset(void);
+#include "southbridge/intel/i82801cx/i82801cx.h"
void hard_reset(void)
{