diff options
Diffstat (limited to 'src/mainboard/via')
| -rw-r--r-- | src/mainboard/via/epia-m/Config.lb | 171 | ||||
| -rw-r--r-- | src/mainboard/via/epia-m/auto.c | 27 | ||||
| -rw-r--r-- | src/mainboard/via/epia-m/chip.h | 2 | ||||
| -rw-r--r-- | src/mainboard/via/epia-m/failover.c | 37 | ||||
| -rw-r--r-- | src/mainboard/via/epia-m/mainboard.c | 35 | ||||
| -rw-r--r-- | src/mainboard/via/epia/Config.lb | 34 | ||||
| -rw-r--r-- | src/mainboard/via/epia/auto.c | 13 | ||||
| -rw-r--r-- | src/mainboard/via/epia/failover.c | 37 | ||||
| -rw-r--r-- | src/mainboard/via/epia/mainboard.c | 28 |
9 files changed, 126 insertions, 258 deletions
diff --git a/src/mainboard/via/epia-m/Config.lb b/src/mainboard/via/epia-m/Config.lb index 8438fcf23b..03277abaaf 100644 --- a/src/mainboard/via/epia-m/Config.lb +++ b/src/mainboard/via/epia-m/Config.lb @@ -1,87 +1,3 @@ -uses HAVE_MP_TABLE -uses HAVE_PIRQ_TABLE -uses USE_FALLBACK_IMAGE -uses HAVE_FALLBACK_BOOT -uses HAVE_HARD_RESET -uses HAVE_OPTION_TABLE -uses USE_OPTION_TABLE -uses CONFIG_ROM_STREAM -uses IRQ_SLOT_COUNT -uses MAINBOARD -uses ARCH -uses FALLBACK_SIZE -uses STACK_SIZE -uses HEAP_SIZE -uses ROM_SIZE -uses ROM_SECTION_SIZE -uses ROM_IMAGE_SIZE -uses ROM_SECTION_SIZE -uses ROM_SECTION_OFFSET -uses CONFIG_ROM_STREAM_START -uses PAYLOAD_SIZE -uses _ROMBASE -uses XIP_ROM_SIZE -uses XIP_ROM_BASE -uses HAVE_MP_TABLE -uses HAVE_ACPI_TABLES - -## ROM_SIZE is the size of boot ROM that this board will use. -default ROM_SIZE = 256*1024 - -### -### Build options -### - -## -## Build code for the fallback boot -## -default HAVE_FALLBACK_BOOT=1 - -## -## no MP table -## -default HAVE_MP_TABLE=0 - -## -## Build code to reset the motherboard from linuxBIOS -## -default HAVE_HARD_RESET=1 - -## -## Build code to export a programmable irq routing table -## -default HAVE_PIRQ_TABLE=1 -default IRQ_SLOT_COUNT=5 -object irq_tables.o - -## -## Build code to export a CMOS option table -## -default HAVE_OPTION_TABLE=1 - -### -### LinuxBIOS layout values -### - -## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy. -default ROM_IMAGE_SIZE = 65536 - -## -## Use a small 8K stack -## -default STACK_SIZE=0x2000 - -## -## Use a small 16K heap -## -default HEAP_SIZE=0x4000 - -## -## Only use the option table in a normal image -## -#default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE -default USE_OPTION_TABLE = 0 - ## ## Compute the location and size of where this firmware image ## (linuxBIOS plus bootloader) will live in the boot rom chip. @@ -100,7 +16,6 @@ end ## default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE ) default CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1) -default CONFIG_ROM_STREAM = 1 ## ## Compute where this copy of linuxBIOS will start in the boot rom @@ -127,8 +42,8 @@ arch i386 end ## Build the objects we have code for in this directory. ## - driver mainboard.o +if HAVE_PIRQ_TABLE object irq_tables.o end #object reset.o if HAVE_ACPI_TABLES @@ -140,41 +55,41 @@ end ## Romcc output ## makerule ./failover.E - depends "$(MAINBOARD)/failover.c" - action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/failover.c > ./failover.E" + depends "$(MAINBOARD)/failover.c ./romcc" + action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end makerule ./failover.inc - depends "./failover.E ./romcc" - action "./romcc -O -mcpu=c3 -o failover.inc --label-prefix=failover ./failover.E" + depends "$(MAINBOARD)/failover.c ./romcc" + action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end makerule ./auto.E - depends "$(MAINBOARD)/auto.c" - action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/auto.c > ./auto.E" + depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + action "./romcc -E -mcpu=c3 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end makerule ./auto.inc - depends "./auto.E ./romcc" - action "./romcc -O -mcpu=c3 ./auto.E " + depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + action "./romcc -mcpu=c3 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end ## ## Build our 16 bit and 32 bit linuxBIOS entry code ## -mainboardinit cpu/i386/entry16.inc -mainboardinit cpu/i386/entry32.inc -ldscript /cpu/i386/entry16.lds -ldscript /cpu/i386/entry32.lds +mainboardinit cpu/x86/16bit/entry16.inc +mainboardinit cpu/x86/32bit/entry32.inc +ldscript /cpu/x86/16bit/entry16.lds +ldscript /cpu/x86/32bit/entry32.lds ## ## Build our reset vector (This is where linuxBIOS is entered) ## if USE_FALLBACK_IMAGE - mainboardinit cpu/i386/reset16.inc - ldscript /cpu/i386/reset16.lds + mainboardinit cpu/x86/16bit/reset16.inc + ldscript /cpu/x86/16bit/reset16.lds else - mainboardinit cpu/i386/reset32.inc - ldscript /cpu/i386/reset32.lds + mainboardinit cpu/x86/32bit/reset32.inc + ldscript /cpu/x86/32bit/reset32.lds end ### Should this be in the northbridge code? @@ -186,11 +101,6 @@ mainboardinit arch/i386/lib/cpu_reset.inc mainboardinit arch/i386/lib/id.inc ldscript /arch/i386/lib/id.lds -## -## Setup our mtrrs -## -# mainboardinit cpu/p6/earlymtrr.inc - ### ### This is the early phase of linuxBIOS startup ### Things are delicate and we test to see if we should @@ -208,7 +118,10 @@ end ## ## Setup RAM ## +mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/mmx/enable_mmx.inc mainboardinit ./auto.inc +mainboardinit cpu/x86/mmx/disable_mmx.inc ## ## Include the secondary Configuration files @@ -216,30 +129,24 @@ mainboardinit ./auto.inc dir /pc80 config chip.h -northbridge via/vt8623 "vt8623" - southbridge via/vt8235 "vt8235" - register "enable_usb" = "0" - register "enable_native_ide" = "0" - register "enable_com_ports" = "1" - register "enable_keyboard" = "0" - register "enable_nvram" = "1" - end - southbridge ricoh/rl5c476 "rl5c476" - end - superio via/vt1211 "vt1211" - register "enable_com_ports" = "1" - register "enable_hwmon" = "1" - register "enable_lpt" = "1" - register "enable_fdc" = "1" +chip northbridge/via/vt8623 + device pci_domain 0 on + chip southbridge/via/vt8235 + register "enable_usb" = "0" + register "enable_native_ide" = "0" + register "enable_com_ports" = "1" + register "enable_keyboard" = "0" + register "enable_nvram" = "1" + end + chip southbridge/ricoh/rl5c476 + end + chip superio/via/vt1211 + register "enable_com_ports" = "1" + register "enable_hwmon" = "1" + register "enable_lpt" = "1" + register "enable_fdc" = "1" + end + chip cpu/via/model_centaur + end end end - -cpu p6 "cpu0" - -end - -## -## Include the old serial code for those few places that still need it. -## -mainboardinit pc80/serial.inc -mainboardinit arch/i386/lib/console.inc diff --git a/src/mainboard/via/epia-m/auto.c b/src/mainboard/via/epia-m/auto.c index 6fbc8306a4..79dbb27867 100644 --- a/src/mainboard/via/epia-m/auto.c +++ b/src/mainboard/via/epia-m/auto.c @@ -3,7 +3,9 @@ #include <stdint.h> #include <device/pci_def.h> #include <device/pci_ids.h> -#include <cpu/p6/apic.h> +#if 0 +#include <cpu/x86/lapic.h> +#endif #include <arch/io.h> #include <device/pnp_def.h> #include <arch/romcc_io.h> @@ -12,7 +14,8 @@ #include "arch/i386/lib/console.c" #include "ram/ramtest.c" #include "northbridge/via/vt8623/raminit.h" -#include "cpu/p6/earlymtrr.c" +#include "cpu/x86/mtrr/earlymtrr.c" +#include "cpu/x86/bist.h" /* */ @@ -24,7 +27,7 @@ void udelay(int usecs) } #include "lib/delay.c" -#include "cpu/p6/boot_cpu.c" +#include "cpu/x86/lapic/boot_cpu.c" #include "debug.c" #include "southbridge/via/vt8235/vt8235_early_smbus.c" @@ -95,10 +98,22 @@ static void enable_shadow_ram(void) pci_write_config8(dev, 0x63, shadowreg); } -static void main(void) +static void main(unsigned long bist) { unsigned long x; device_t dev; + + if (bist == 0) { + early_mtrr_init(); + } + enable_vt8235_serial(); + uart_init(); + console_init(); + + + /* Halt if there was a built in self test failure */ + report_bist_failure(bist); + /* init_timer();*/ outb(5, 0x80); @@ -108,10 +123,7 @@ static void main(void) outb(5, 0x80); enable_smbus(); - enable_vt8235_serial(); - uart_init(); - console_init(); enable_mainboard_devices(); enable_shadow_ram(); @@ -144,5 +156,4 @@ static void main(void) ram_check(check_addrs[i].lo, check_addrs[i].hi); } #endif - early_mtrr_init(); } diff --git a/src/mainboard/via/epia-m/chip.h b/src/mainboard/via/epia-m/chip.h index 7b62d6d50b..2710e7b035 100644 --- a/src/mainboard/via/epia-m/chip.h +++ b/src/mainboard/via/epia-m/chip.h @@ -1,4 +1,4 @@ -extern struct chip_operations mainboard_via_epia_m_control; +extern struct chip_operations mainboard_via_epia_m_ops; struct mainboard_via_epia_m_config { int nothing; diff --git a/src/mainboard/via/epia-m/failover.c b/src/mainboard/via/epia-m/failover.c index bd0df4e89d..bdcb9eaed2 100644 --- a/src/mainboard/via/epia-m/failover.c +++ b/src/mainboard/via/epia-m/failover.c @@ -5,25 +5,28 @@ #include <arch/io.h> #include "arch/romcc_io.h" #include "pc80/mc146818rtc_early.c" -#include "cpu/p6/boot_cpu.c" -static void main(void) +static unsigned long main(unsigned long bist) { - /* for now, just always assume failure */ - -#if 0 - /* Is this a cpu reset? */ - if (cpu_init_detected()) { - if (last_boot_normal()) { - asm("jmp __normal_image"); - } else { - asm("jmp __cpu_reset"); - } - } - /* This is the primary cpu how should I boot? */ - else if (do_normal_boot()) { - asm("jmp __normal_image"); + if (do_normal_boot()) { + goto normal_image; + } + else { + goto fallback_image; } -#endif + normal_image: + asm volatile ("jmp __normal_image" + : /* outputs */ + : "a" (bist) /* inputs */ + : /* clobbers */ + ); + cpu_reset: + asm volatile ("jmp __cpu_reset" + : /* outputs */ + : "a"(bist) /* inputs */ + : /* clobbers */ + ); + fallback_image: + return bist; } diff --git a/src/mainboard/via/epia-m/mainboard.c b/src/mainboard/via/epia-m/mainboard.c index a278af7fff..9eb7b3705b 100644 --- a/src/mainboard/via/epia-m/mainboard.c +++ b/src/mainboard/via/epia-m/mainboard.c @@ -3,24 +3,13 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> - #include <arch/io.h> #include "chip.h" void vga_enable_console(); -static int -mainboard_scan_bus(device_t root, int maxbus) -{ - int retval; - printk_spew("%s: root %p maxbus %d\n", __FUNCTION__, root, maxbus); - retval = pci_scan_bus(root->bus, 0, 0xff, maxbus); - printk_spew("DONE %s: return %d\n", __FUNCTION__, maxbus); - return maxbus; -} - -void vga_fixup(void) { +static void vga_fixup(void) { // we do this right here because: // - all the hardware is working, and some VGA bioses seem to need // that @@ -36,7 +25,7 @@ void vga_fixup(void) { } -void write_protect_vgabios(void) +static void write_protect_vgabios(void) { device_t dev; @@ -44,25 +33,9 @@ void write_protect_vgabios(void) dev = dev_find_device(PCI_VENDOR_ID_VIA, 0x3123, 0); if(dev) pci_write_config8(dev, 0x61, 0xaa); - -} - -static struct device_operations mainboard_operations = { - .read_resources = root_dev_read_resources, - .set_resources = root_dev_set_resources, - .enable_resources = root_dev_enable_resources, - .init = root_dev_init, - .scan_bus = mainboard_scan_bus, - .enable = 0, -}; - -static void enable_dev(device_t dev) -{ - dev->ops = &mainboard_operations; } -struct chip_operations mainboard_via_epia_m_control = { - .enable_dev = enable_dev, - .name = "VIA EPIA-M mainboard ", +struct chip_operations mainboard_via_epia_m_ops = { + CHIP_NAME("VIA EPIA-M mainboard ") }; diff --git a/src/mainboard/via/epia/Config.lb b/src/mainboard/via/epia/Config.lb index d8485dff0a..448d86fb09 100644 --- a/src/mainboard/via/epia/Config.lb +++ b/src/mainboard/via/epia/Config.lb @@ -42,7 +42,6 @@ arch i386 end ## Build the objects we have code for in this directory. ## - driver mainboard.o if HAVE_PIRQ_TABLE object irq_tables.o end #object reset.o @@ -51,22 +50,22 @@ if HAVE_PIRQ_TABLE object irq_tables.o end ## Romcc output ## makerule ./failover.E - depends "$(MAINBOARD)/failover.c" - action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/failover.c > ./failover.E" + depends "$(MAINBOARD)/failover.c ./romcc" + action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end makerule ./failover.inc - depends "./failover.E ./romcc" - action "./romcc -O -mcpu=c3 -o failover.inc --label-prefix=failover ./failover.E" + depends "$(MAINBOARD)/failover.c ./romcc" + action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@" end makerule ./auto.E - depends "$(MAINBOARD)/auto.c" - action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/auto.c > ./auto.E" + depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + action "./romcc -E -mcpu=c3 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end makerule ./auto.inc - depends "./auto.E ./romcc" - action "./romcc -O -mcpu=c3 ./auto.E " + depends "$(MAINBOARD)/auto.c option_table.h ./romcc" + action "./romcc -mcpu=c3 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@" end ## @@ -97,11 +96,6 @@ mainboardinit arch/i386/lib/cpu_reset.inc mainboardinit arch/i386/lib/id.inc ldscript /arch/i386/lib/id.lds -## -## Setup our mtrrs -## -# mainboardinit cpu/p6/earlymtrr.inc - ### ### This is the early phase of linuxBIOS startup ### Things are delicate and we test to see if we should @@ -119,7 +113,10 @@ end ## ## Setup RAM ## +mainboardinit cpu/x86/fpu/enable_fpu.inc +mainboardinit cpu/x86/mmx/enable_mmx.inc mainboardinit ./auto.inc +mainboardinit cpu/x86/mmx/disable_mmx.inc ## ## Include the secondary Configuration files @@ -183,13 +180,6 @@ chip northbridge/via/vt8601 end end end - chip cpu/via/model_centaur + chip cpu/via/model_centaur end end - -## -## Include the old serial code for those few places that still need it. -## -mainboardinit pc80/serial.inc -mainboardinit arch/i386/lib/console.inc - diff --git a/src/mainboard/via/epia/auto.c b/src/mainboard/via/epia/auto.c index 377dc54754..6c8ea903ee 100644 --- a/src/mainboard/via/epia/auto.c +++ b/src/mainboard/via/epia/auto.c @@ -2,7 +2,9 @@ #include <stdint.h> #include <device/pci_def.h> +#if 0 #include <cpu/x86/lapic.h> +#endif #include <arch/io.h> #include <device/pnp_def.h> #include <arch/romcc_io.h> @@ -12,6 +14,7 @@ #include "ram/ramtest.c" #include "northbridge/via/vt8601/raminit.h" #include "cpu/x86/mtrr/earlymtrr.c" +#include "cpu/x86/bist.h" /* */ @@ -93,14 +96,19 @@ static void enable_shadow_ram(void) pci_write_config8(dev, 0x63, shadowreg); } -static void main(void) +static void main(unsigned long bist) { unsigned long x; + if (bist == 0) { + early_mtrr_init(); + } enable_vt8231_serial(); - uart_init(); console_init(); + + /* Halt if there was a built in self test failure */ + report_bist_failure(bist); enable_mainboard_devices(); enable_smbus(); @@ -134,5 +142,4 @@ static void main(void) ram_check(check_addrs[i].lo, check_addrs[i].hi); } #endif - early_mtrr_init(); } diff --git a/src/mainboard/via/epia/failover.c b/src/mainboard/via/epia/failover.c index 10bb2f48c1..bdcb9eaed2 100644 --- a/src/mainboard/via/epia/failover.c +++ b/src/mainboard/via/epia/failover.c @@ -5,25 +5,28 @@ #include <arch/io.h> #include "arch/romcc_io.h" #include "pc80/mc146818rtc_early.c" -#include "cpu/x86/lapic/boot_cpu.c" -static void main(void) +static unsigned long main(unsigned long bist) { - /* for now, just always assume failure */ - -#if 0 - /* Is this a cpu reset? */ - if (cpu_init_detected()) { - if (last_boot_normal()) { - asm("jmp __normal_image"); - } else { - asm("jmp __cpu_reset"); - } - } - /* This is the primary cpu how should I boot? */ - else if (do_normal_boot()) { - asm("jmp __normal_image"); + if (do_normal_boot()) { + goto normal_image; + } + else { + goto fallback_image; } -#endif + normal_image: + asm volatile ("jmp __normal_image" + : /* outputs */ + : "a" (bist) /* inputs */ + : /* clobbers */ + ); + cpu_reset: + asm volatile ("jmp __cpu_reset" + : /* outputs */ + : "a"(bist) /* inputs */ + : /* clobbers */ + ); + fallback_image: + return bist; } diff --git a/src/mainboard/via/epia/mainboard.c b/src/mainboard/via/epia/mainboard.c index bed59cd76e..9f3326a930 100644 --- a/src/mainboard/via/epia/mainboard.c +++ b/src/mainboard/via/epia/mainboard.c @@ -3,36 +3,10 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> - #include <arch/io.h> #include "chip.h" -static unsigned int -mainboard_scan_bus(device_t root, unsigned int maxbus) -{ - int retval; - printk_spew("%s: root %p maxbus %d\n", __FUNCTION__, root, maxbus); - retval = pci_scan_bus(root->bus, 0, 0xff, maxbus); - printk_spew("DONE %s: return %d\n", __FUNCTION__, maxbus); - return maxbus; -} - -static struct device_operations mainboard_operations = { - .read_resources = root_dev_read_resources, - .set_resources = root_dev_set_resources, - .enable_resources = root_dev_enable_resources, - .init = root_dev_init, - .scan_bus = mainboard_scan_bus, - .enable = 0, -}; - -static void enable_dev(device_t dev) -{ - dev->ops = &mainboard_operations; -} - struct chip_operations mainboard_via_epia_ops = { - .enable_dev = enable_dev, - .name = "VIA EPIA mainboard ", + CHIP_NAME("VIA EPIA mainboard ") }; |