diff options
Diffstat (limited to 'src/mainboard/via/vt8454c')
| -rw-r--r-- | src/mainboard/via/vt8454c/Config.lb | 20 | ||||
| -rw-r--r-- | src/mainboard/via/vt8454c/Options.lb | 156 | ||||
| -rw-r--r-- | src/mainboard/via/vt8454c/irq_tables.c | 2 |
3 files changed, 89 insertions, 89 deletions
diff --git a/src/mainboard/via/vt8454c/Config.lb b/src/mainboard/via/vt8454c/Config.lb index 534f910b19..9860ba6676 100644 --- a/src/mainboard/via/vt8454c/Config.lb +++ b/src/mainboard/via/vt8454c/Config.lb @@ -19,8 +19,8 @@ ## MA 02110-1301 USA ## -## XIP_ROM_SIZE must be a power of 2. -default XIP_ROM_SIZE = 64 * 1024 +## CONFIG_XIP_ROM_SIZE must be a power of 2. +default CONFIG_XIP_ROM_SIZE = 64 * 1024 include /config/nofailovercalculation.lb ## @@ -35,20 +35,20 @@ arch i386 end driver mainboard.o -if HAVE_MP_TABLE +if CONFIG_HAVE_MP_TABLE object mptable.o end -if HAVE_PIRQ_TABLE +if CONFIG_HAVE_PIRQ_TABLE object irq_tables.o end -if HAVE_ACPI_TABLES +if CONFIG_HAVE_ACPI_TABLES object fadt.o object acpi_tables.o makerule dsdt.c - depends "$(MAINBOARD)/dsdt.dsl" - action "iasl -p dsdt -tc $(MAINBOARD)/dsdt.dsl" + depends "$(CONFIG_MAINBOARD)/dsdt.dsl" + action "iasl -p dsdt -tc $(CONFIG_MAINBOARD)/dsdt.dsl" action "mv dsdt.hex dsdt.c" end object ./dsdt.o @@ -58,8 +58,8 @@ end ## Romcc output ## makerule ./auto.inc - depends "$(MAINBOARD)/auto.c option_table.h" - action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -c -S $(MAINBOARD)/auto.c -o $@" + depends "$(CONFIG_MAINBOARD)/auto.c option_table.h" + action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -c -S $(CONFIG_MAINBOARD)/auto.c -o $@" action "perl -e 's/\.rodata/.rom.data/g' -pi $@" action "perl -e 's/\.text/.section .rom.text/g' -pi $@" end @@ -75,7 +75,7 @@ ldscript /cpu/x86/32bit/entry32.lds ## ## Build our reset vector (This is where coreboot is entered) ## -if USE_FALLBACK_IMAGE +if CONFIG_USE_FALLBACK_IMAGE mainboardinit cpu/x86/16bit/reset16.inc ldscript /cpu/x86/16bit/reset16.lds else diff --git a/src/mainboard/via/vt8454c/Options.lb b/src/mainboard/via/vt8454c/Options.lb index 3f1bdb768b..d9ba74c01b 100644 --- a/src/mainboard/via/vt8454c/Options.lb +++ b/src/mainboard/via/vt8454c/Options.lb @@ -19,57 +19,57 @@ ## MA 02110-1301 USA ## -uses HAVE_MP_TABLE -uses HAVE_PIRQ_TABLE -uses IRQ_SLOT_COUNT -uses HAVE_ACPI_TABLES -uses HAVE_OPTION_TABLE -uses USE_OPTION_TABLE -uses HAVE_LOW_TABLES - -uses USE_FALLBACK_IMAGE -uses HAVE_FALLBACK_BOOT -uses HAVE_HARD_RESET -uses MAINBOARD -uses MAINBOARD_VENDOR -uses MAINBOARD_PART_NUMBER +uses CONFIG_HAVE_MP_TABLE +uses CONFIG_HAVE_PIRQ_TABLE +uses CONFIG_IRQ_SLOT_COUNT +uses CONFIG_HAVE_ACPI_TABLES +uses CONFIG_HAVE_OPTION_TABLE +uses CONFIG_USE_OPTION_TABLE +uses CONFIG_HAVE_LOW_TABLES + +uses CONFIG_USE_FALLBACK_IMAGE +uses CONFIG_HAVE_FALLBACK_BOOT +uses CONFIG_HAVE_HARD_RESET +uses CONFIG_MAINBOARD +uses CONFIG_MAINBOARD_VENDOR +uses CONFIG_MAINBOARD_PART_NUMBER uses COREBOOT_EXTRA_VERSION -uses ARCH -uses FALLBACK_SIZE -uses STACK_SIZE -uses HEAP_SIZE -uses ROM_SIZE -uses ROM_SECTION_SIZE -uses ROM_IMAGE_SIZE -uses ROM_SECTION_SIZE -uses ROM_SECTION_OFFSET +uses CONFIG_ARCH +uses CONFIG_FALLBACK_SIZE +uses CONFIG_STACK_SIZE +uses CONFIG_HEAP_SIZE +uses CONFIG_ROM_SIZE +uses CONFIG_ROM_SECTION_SIZE +uses CONFIG_ROM_IMAGE_SIZE +uses CONFIG_ROM_SECTION_SIZE +uses CONFIG_ROM_SECTION_OFFSET uses CONFIG_COMPRESS uses CONFIG_ROM_PAYLOAD uses CONFIG_ROM_PAYLOAD_START uses CONFIG_COMPRESSED_PAYLOAD_NRV2B uses CONFIG_COMPRESSED_PAYLOAD_LZMA -uses PAYLOAD_SIZE +uses CONFIG_PAYLOAD_SIZE -uses _ROMBASE -uses _RAMBASE -uses XIP_ROM_SIZE -uses XIP_ROM_BASE +uses CONFIG_ROMBASE +uses CONFIG_RAMBASE +uses CONFIG_XIP_ROM_SIZE +uses CONFIG_XIP_ROM_BASE uses CONFIG_CBFS # compiler specifics -uses CROSS_COMPILE +uses CONFIG_CROSS_COMPILE uses CC -uses HOSTCC -uses OBJCOPY +uses CONFIG_HOSTCC +uses CONFIG_OBJCOPY # Console specifics -uses DEFAULT_CONSOLE_LOGLEVEL -uses MAXIMUM_CONSOLE_LOGLEVEL +uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL +uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL uses CONFIG_CONSOLE_SERIAL8250 -uses TTYS0_BAUD -uses TTYS0_BASE -uses TTYS0_LCS +uses CONFIG_TTYS0_BAUD +uses CONFIG_TTYS0_BASE +uses CONFIG_TTYS0_LCS uses CONFIG_UDELAY_TSC uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 @@ -81,19 +81,19 @@ uses CONFIG_IOAPIC uses CONFIG_GDB_STUB -uses USE_DCACHE_RAM -uses DCACHE_RAM_BASE -uses DCACHE_RAM_SIZE +uses CONFIG_USE_DCACHE_RAM +uses CONFIG_DCACHE_RAM_BASE +uses CONFIG_DCACHE_RAM_SIZE uses CONFIG_USE_PRINTK_IN_CAR -## ROM_SIZE is the size of boot ROM that this board will use. -default ROM_SIZE = 256*1024 +## CONFIG_ROM_SIZE is the size of boot ROM that this board will use. +default CONFIG_ROM_SIZE = 256*1024 -default USE_DCACHE_RAM=1 -default DCACHE_RAM_BASE=0xffef0000 -#default DCACHE_RAM_BASE=0xffbf0000 -#default DCACHE_RAM_BASE=0xfec00000 -default DCACHE_RAM_SIZE=0x8000 +default CONFIG_USE_DCACHE_RAM=1 +default CONFIG_DCACHE_RAM_BASE=0xffef0000 +#default CONFIG_DCACHE_RAM_BASE=0xffbf0000 +#default CONFIG_DCACHE_RAM_BASE=0xfec00000 +default CONFIG_DCACHE_RAM_SIZE=0x8000 default CONFIG_USE_PRINTK_IN_CAR=1 ### @@ -105,7 +105,7 @@ default CONFIG_CONSOLE_VGA=0 ## ## Build code for the fallback boot ## -default HAVE_FALLBACK_BOOT=1 +default CONFIG_HAVE_FALLBACK_BOOT=1 ## ## Use TSC for udelay. @@ -116,34 +116,34 @@ default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1 ## ## Build code to reset the motherboard from linuxBIOS ## -default HAVE_HARD_RESET=1 +default CONFIG_HAVE_HARD_RESET=1 ## ## Build code to export a programmable irq routing table ## -default HAVE_PIRQ_TABLE=1 -default IRQ_SLOT_COUNT=15 +default CONFIG_HAVE_PIRQ_TABLE=1 +default CONFIG_IRQ_SLOT_COUNT=15 ## ## Build code to export an x86 MP table ## Useful for specifying IRQ routing values ## -default HAVE_MP_TABLE=1 +default CONFIG_HAVE_MP_TABLE=1 ## ## Build code to load acpi tables ## -default HAVE_ACPI_TABLES=1 +default CONFIG_HAVE_ACPI_TABLES=1 ## ## Build code to export a CMOS option table ## -default HAVE_OPTION_TABLE=1 +default CONFIG_HAVE_OPTION_TABLE=1 ## ## Build code to fill in tables both in low and high memory ## -default HAVE_LOW_TABLES=1 +default CONFIG_HAVE_LOW_TABLES=1 ## @@ -156,36 +156,36 @@ default CONFIG_IOAPIC=1 ### LinuxBIOS layout values ### -## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy. -default ROM_IMAGE_SIZE = 65536 -default FALLBACK_SIZE = ROM_IMAGE_SIZE +## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy. +default CONFIG_ROM_IMAGE_SIZE = 65536 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE ## ## Use a small 8K stack ## -default STACK_SIZE=0x2000 +default CONFIG_STACK_SIZE=0x2000 ## ## Use a small 16K heap ## -default HEAP_SIZE=0x4000 +default CONFIG_HEAP_SIZE=0x4000 ## ## Only use the option table in a normal image ## -#default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE -default USE_OPTION_TABLE = 0 +#default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE +default CONFIG_USE_OPTION_TABLE = 0 -default _RAMBASE = 0x00004000 +default CONFIG_RAMBASE = 0x00004000 default CONFIG_ROM_PAYLOAD = 1 ## ## The default compiler ## -default CROSS_COMPILE="" -default CC="$(CROSS_COMPILE)gcc -m32" -default HOSTCC="gcc" +default CONFIG_CROSS_COMPILE="" +default CC="$(CONFIG_CROSS_COMPILE)gcc -m32" +default CONFIG_HOSTCC="gcc" ## ## Set this to the max PCI bus number you @@ -209,21 +209,21 @@ default CONFIG_GDB_STUB=0 default CONFIG_CONSOLE_SERIAL8250=1 ## Select the serial console baud rate -default TTYS0_BAUD=115200 -#default TTYS0_BAUD=57600 -#default TTYS0_BAUD=38400 -#default TTYS0_BAUD=19200 -#default TTYS0_BAUD=9600 -#default TTYS0_BAUD=4800 -#default TTYS0_BAUD=2400 -#default TTYS0_BAUD=1200 +default CONFIG_TTYS0_BAUD=115200 +#default CONFIG_TTYS0_BAUD=57600 +#default CONFIG_TTYS0_BAUD=38400 +#default CONFIG_TTYS0_BAUD=19200 +#default CONFIG_TTYS0_BAUD=9600 +#default CONFIG_TTYS0_BAUD=4800 +#default CONFIG_TTYS0_BAUD=2400 +#default CONFIG_TTYS0_BAUD=1200 # Select the serial console base port -default TTYS0_BASE=0x3f8 +default CONFIG_TTYS0_BASE=0x3f8 # Select the serial protocol # This defaults to 8 data bits, 1 stop bit, and no parity -default TTYS0_LCS=0x3 +default CONFIG_TTYS0_LCS=0x3 ## ## Select the coreboot loglevel @@ -235,13 +235,13 @@ default TTYS0_LCS=0x3 ## WARNING 5 warning conditions ## NOTICE 6 normal but significant condition ## INFO 7 informational -## DEBUG 8 debug-level messages +## CONFIG_DEBUG 8 debug-level messages ## SPEW 9 Way too many details ## Request this level of debugging output -default DEFAULT_CONSOLE_LOGLEVEL=5 +default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=5 ## At a maximum only compile in this level of debugging -default MAXIMUM_CONSOLE_LOGLEVEL=5 +default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=5 # # CBFS diff --git a/src/mainboard/via/vt8454c/irq_tables.c b/src/mainboard/via/vt8454c/irq_tables.c index 40d1ebb691..fffce3170d 100644 --- a/src/mainboard/via/vt8454c/irq_tables.c +++ b/src/mainboard/via/vt8454c/irq_tables.c @@ -24,7 +24,7 @@ const struct irq_routing_table intel_irq_routing_table = { PIRQ_SIGNATURE, /* u32 signature */ PIRQ_VERSION, /* u16 version */ - 32 + 16 * IRQ_SLOT_COUNT, /* There can be total 15 devices on the bus */ + 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* There can be total 15 devices on the bus */ 0x00, /* Where the interrupt router lies (bus) */ (0x11 << 3) | 0x0, /* Where the interrupt router lies (dev) */ 0xc20, /* IRQs devoted exclusively to PCI usage */ |