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-rw-r--r--src/mainboard/tyan/s2912/romstage.c4
-rw-r--r--src/mainboard/tyan/s2912_fam10/romstage.c4
2 files changed, 2 insertions, 6 deletions
diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c
index 6548f77e62..695d2cbe8a 100644
--- a/src/mainboard/tyan/s2912/romstage.c
+++ b/src/mainboard/tyan/s2912/romstage.c
@@ -38,8 +38,6 @@
#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
#endif
-#define DBGP_DEFAULT 7
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
@@ -192,7 +190,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
report_bist_failure(bist);
#if CONFIG_USBDEBUG
- mcp55_enable_usbdebug(DBGP_DEFAULT);
+ mcp55_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
early_usbdebug_init();
#endif
console_init();
diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c
index 5792d34af7..ed79299e8c 100644
--- a/src/mainboard/tyan/s2912_fam10/romstage.c
+++ b/src/mainboard/tyan/s2912_fam10/romstage.c
@@ -33,8 +33,6 @@
#define SET_FIDVID 1
#define SET_FIDVID_CORE_RANGE 0
-#define DBGP_DEFAULT 7
-
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
@@ -180,7 +178,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
report_bist_failure(bist);
#if CONFIG_USBDEBUG
- mcp55_enable_usbdebug(DBGP_DEFAULT);
+ mcp55_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT);
early_usbdebug_init();
#endif