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-rw-r--r--src/mainboard/tyan/s2912/romstage.c2
-rw-r--r--src/mainboard/tyan/s2912_fam10/romstage.c2
2 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c
index ab0b4220b1..0dd7297ea2 100644
--- a/src/mainboard/tyan/s2912/romstage.c
+++ b/src/mainboard/tyan/s2912/romstage.c
@@ -82,7 +82,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "cpu/amd/car/post_cache_as_ram.c"
#include "cpu/amd/model_fxx/init_cpus.c"
#include "cpu/amd/model_fxx/fidvid.c"
-#include "southbridge/nvidia/mcp55/mcp55_enable_rom.c"
#include "northbridge/amd/amdk8/early_ht.c"
static void sio_setup(void)
@@ -125,7 +124,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Allow the HT devices to be found */
enumerate_ht_chain();
sio_setup();
- mcp55_enable_rom();
}
if (bist == 0)
diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c
index 550e86607a..d5d2c4129b 100644
--- a/src/mainboard/tyan/s2912_fam10/romstage.c
+++ b/src/mainboard/tyan/s2912_fam10/romstage.c
@@ -79,7 +79,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "cpu/amd/microcode/microcode.c"
#include "cpu/amd/model_10xxx/update_microcode.c"
#include "cpu/amd/model_10xxx/init_cpus.c"
-#include "southbridge/nvidia/mcp55/mcp55_enable_rom.c"
#include "northbridge/amd/amdfam10/early_ht.c"
static void sio_setup(void)
@@ -123,7 +122,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
set_bsp_node_CHtExtNodeCfgEn();
enumerate_ht_chain();
sio_setup();
- mcp55_enable_rom();
}
post_code(0x30);