diff options
Diffstat (limited to 'src/mainboard/tyan')
| -rw-r--r-- | src/mainboard/tyan/s2912_fam10/romstage.c | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c index 1e439d45b4..6cc6b0e480 100644 --- a/src/mainboard/tyan/s2912_fam10/romstage.c +++ b/src/mainboard/tyan/s2912_fam10/romstage.c @@ -73,11 +73,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "southbridge/nvidia/mcp55/early_setup_ss.h" #include "southbridge/nvidia/mcp55/early_setup_car.c" #include "cpu/amd/car/post_cache_as_ram.c" -#include "cpu/amd/microcode/microcode.c" - -#if CONFIG_UPDATE_CPU_MICROCODE -#include "cpu/amd/model_10xxx/update_microcode.c" -#endif +#include "cpu/amd/microcode.h" #include "cpu/amd/model_10xxx/init_cpus.c" #include "northbridge/amd/amdfam10/early_ht.c" @@ -147,9 +143,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* Setup sysinfo defaults */ set_sysinfo_in_ram(0); -#if CONFIG_UPDATE_CPU_MICROCODE update_microcode(val); -#endif + post_code(0x33); cpuSetAMDMSR(); |