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-rw-r--r--src/mainboard/tyan/s4880/Config.lb1
-rw-r--r--src/mainboard/tyan/s4880/cache_as_ram_auto.c29
2 files changed, 2 insertions, 28 deletions
diff --git a/src/mainboard/tyan/s4880/Config.lb b/src/mainboard/tyan/s4880/Config.lb
index 74c5542f87..54fc432d72 100644
--- a/src/mainboard/tyan/s4880/Config.lb
+++ b/src/mainboard/tyan/s4880/Config.lb
@@ -43,7 +43,6 @@ arch i386 end
driver mainboard.o
if HAVE_MP_TABLE object mptable.o end
if HAVE_PIRQ_TABLE object irq_tables.o end
-object reset.o
if USE_DCACHE_RAM
if CONFIG_USE_INIT
diff --git a/src/mainboard/tyan/s4880/cache_as_ram_auto.c b/src/mainboard/tyan/s4880/cache_as_ram_auto.c
index 0165a1f8c2..1a16eff09f 100644
--- a/src/mainboard/tyan/s4880/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s4880/cache_as_ram_auto.c
@@ -36,31 +36,7 @@
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
-static void hard_reset(void)
-{
- device_t dev;
-
- /* Find the device */
- dev = PCI_DEV(node_link_to_bus(0, 2), 0x04, 3);
-
- set_bios_reset();
-
- /* enable cf9 */
- pci_write_config8(dev, 0x41, 0xf1);
- /* reset */
- outb(0x0e, 0x0cf9);
-}
-
-static void soft_reset(void)
-{
- device_t dev;
-
- /* Find the device */
- dev = PCI_DEV(node_link_to_bus(0, 2), 0x04, 0);
-
- set_bios_reset();
- pci_write_config8(dev, 0x47, 1);
-}
+#include "southbridge/amd/amd8111/amd8111_early_ctrl.c"
static void memreset_setup(void)
{
@@ -247,7 +223,6 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
};
int needs_reset;
- unsigned cpu_reset = 0;
if (bist == 0) {
init_cpus(cpu_init_detectedx);
@@ -281,5 +256,5 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
memreset_setup();
sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu);
- post_cache_as_ram(cpu_reset);
+ post_cache_as_ram();
}