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Diffstat (limited to 'src/mainboard/tyan/s2912_fam10/romstage.c')
-rw-r--r--src/mainboard/tyan/s2912_fam10/romstage.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c
index 5290470929..27d51aba25 100644
--- a/src/mainboard/tyan/s2912_fam10/romstage.c
+++ b/src/mainboard/tyan/s2912_fam10/romstage.c
@@ -181,8 +181,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
report_bist_failure(bist);
#if CONFIG_USBDEBUG_DIRECT
- mcp55_enable_usbdebug_direct(DBGP_DEFAULT);
- early_usbdebug_direct_init();
+ mcp55_enable_usbdebug(DBGP_DEFAULT);
+ early_usbdebug_init();
#endif
val = cpuid_eax(1);