diff options
Diffstat (limited to 'src/mainboard/tyan/s2892/romstage.c')
-rw-r--r-- | src/mainboard/tyan/s2892/romstage.c | 24 |
1 files changed, 5 insertions, 19 deletions
diff --git a/src/mainboard/tyan/s2892/romstage.c b/src/mainboard/tyan/s2892/romstage.c index 180609c72e..2ab6d32090 100644 --- a/src/mainboard/tyan/s2892/romstage.c +++ b/src/mainboard/tyan/s2892/romstage.c @@ -25,14 +25,8 @@ #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) -static void memreset(int controllers, const struct mem_controller *ctrl) -{ -} - -static inline void activate_spd_rom(const struct mem_controller *ctrl) -{ - /* nothing to do */ -} +static void memreset(int controllers, const struct mem_controller *ctrl) { } +static void activate_spd_rom(const struct mem_controller *ctrl) { } static inline int spd_read_byte(unsigned device, unsigned address) { @@ -42,7 +36,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "lib/generic_sdram.c" -#include "resourcemap.c" /* tyan does not want the default */ +#include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include "southbridge/nvidia/ck804/ck804_early_setup_ss.h" @@ -84,23 +78,18 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) }; int needs_reset; - unsigned bsp_apicid = 0; - + unsigned bsp_apicid = 0, nodes; struct mem_controller ctrl[8]; - unsigned nodes; if (!cpu_init_detectedx && boot_cpu()) { /* Nothing special needs to be done to find bus 0 */ /* Allow the HT devices to be found */ - enumerate_ht_chain(); - sio_setup(); } - if (bist == 0) { + if (bist == 0) bsp_apicid = init_cpus(cpu_init_detectedx); - } // post_code(0x32); @@ -123,9 +112,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) #endif needs_reset |= ht_setup_chains_x(); - needs_reset |= ck804_early_setup_x(); - if (needs_reset) { printk(BIOS_INFO, "ht reset -\n"); soft_reset(); @@ -143,4 +130,3 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) post_cache_as_ram(); } - |