diff options
Diffstat (limited to 'src/mainboard/tyan/s2885')
| -rw-r--r-- | src/mainboard/tyan/s2885/Config.lb | 2 | ||||
| -rw-r--r-- | src/mainboard/tyan/s2885/get_bus_conf.c | 139 | ||||
| -rw-r--r-- | src/mainboard/tyan/s2885/irq_tables.c | 129 | ||||
| -rw-r--r-- | src/mainboard/tyan/s2885/mptable.c | 185 |
4 files changed, 282 insertions, 173 deletions
diff --git a/src/mainboard/tyan/s2885/Config.lb b/src/mainboard/tyan/s2885/Config.lb index d67570445b..37b0d90522 100644 --- a/src/mainboard/tyan/s2885/Config.lb +++ b/src/mainboard/tyan/s2885/Config.lb @@ -41,7 +41,7 @@ arch i386 end driver mainboard.o #dir /drivers/si/3114 - +object get_bus_conf.o if HAVE_MP_TABLE object mptable.o end if HAVE_PIRQ_TABLE object irq_tables.o end object reset.o diff --git a/src/mainboard/tyan/s2885/get_bus_conf.c b/src/mainboard/tyan/s2885/get_bus_conf.c new file mode 100644 index 0000000000..5e8e0bd347 --- /dev/null +++ b/src/mainboard/tyan/s2885/get_bus_conf.c @@ -0,0 +1,139 @@ +#include <console/console.h> +#include <device/pci.h> +#include <device/pci_ids.h> +#include <string.h> +#include <stdint.h> +#if CONFIG_LOGICAL_CPUS==1 +#include <cpu/amd/dualcore.h> +#endif + + +// Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables +//busnum is default +unsigned char bus_isa = 7 ; +unsigned char bus_8131_0 = 1; +unsigned char bus_8131_1 = 2; +unsigned char bus_8131_2 = 3; +unsigned char bus_8111_0 = 1; +unsigned char bus_8111_1 = 4; +unsigned char bus_8151_0 = 5; +unsigned char bus_8151_1 = 6; +unsigned apicid_8111 ; +unsigned apicid_8131_1; +unsigned apicid_8131_2; + +unsigned sblk; +unsigned pci1234[] = +{ //Here you only need to set value in pci1234 for HT-IO that could be installed or not + //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail + 0x0000ff0, + 0x0000ff0, +// 0x0000ff0, +// 0x0000ff0, +// 0x0000ff0, +// 0x0000ff0, +// 0x0000ff0, +// 0x0000ff0 +}; +unsigned hc_possible_num; +unsigned sbdn; +unsigned hcdn[] = +{ //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most + 0x20202020, + 0x20202020, +// 0x20202020, +// 0x20202020, +// 0x20202020, +// 0x20202020, +// 0x20202020, +// 0x20202020, +}; +unsigned sbdn3; +unsigned sbdn5; + +extern void get_sblk_pci1234(void); + +static unsigned get_bus_conf_done = 0; + +void get_bus_conf(void) +{ + + unsigned apicid_base; + + device_t dev; + + if(get_bus_conf_done==1) return; //do it only once + + get_bus_conf_done = 1; + + hc_possible_num = sizeof(pci1234)/sizeof(pci1234[0]); + + get_sblk_pci1234(); + + sbdn = (hcdn[0] >> 8) & 0xff; + sbdn3 = hcdn[0] & 0xff; + sbdn5 = hcdn[1] & 0xff; + + bus_8131_0 = (pci1234[0] >> 16) & 0xff; + bus_8111_0 = bus_8131_0; + + /* 8111 */ + dev = dev_find_slot(bus_8111_0, PCI_DEVFN(sbdn,0)); + if (dev) { + bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); +#if HT_CHAIN_END_UNITID_BASE >= HT_CHAIN_UNITID_BASE + bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS); + bus_isa++; +// printk_debug("bus_isa=%d\n",bus_isa); +#endif + } + else { + printk_debug("ERROR - could not find PCI %02x:03.0, using defaults\n", bus_8111_0); + } + + /* 8131-1 */ + dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,0)); + if (dev) { + bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); +#if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE + bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS); + bus_isa++; +// printk_debug("bus_isa=%d\n",bus_isa); +#endif + } + else { + printk_debug("ERROR - could not find PCI %02x:01.0, using defaults\n", bus_8131_0); + } + + /* 8132-2 */ + dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,0)); + if (dev) { + bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS); + } + else { + printk_debug("ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0); + } + + /* HT chain 1 */ + // it is on node0, so it must be there + bus_8151_0 = (pci1234[1] >> 16) & 0xff; + /* 8151 */ + dev = dev_find_slot(bus_8151_0, PCI_DEVFN(sbdn5+1, 0)); + + if (dev) { + bus_8151_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); +// printk_debug("bus_8151_1=%d\n",bus_8151_1); + bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS); + bus_isa++; + } + +/*I/O APICs: APIC ID Version State Address*/ +#if CONFIG_LOGICAL_CPUS==1 + apicid_base = get_apicid_base(3); +#else + apicid_base = CONFIG_MAX_PHYSICAL_CPUS; +#endif + apicid_8111 = apicid_base+0; + apicid_8131_1 = apicid_base+1; + apicid_8131_2 = apicid_base+2; +} diff --git a/src/mainboard/tyan/s2885/irq_tables.c b/src/mainboard/tyan/s2885/irq_tables.c index 82e783a6c9..59c3704c83 100644 --- a/src/mainboard/tyan/s2885/irq_tables.c +++ b/src/mainboard/tyan/s2885/irq_tables.c @@ -4,36 +4,109 @@ Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM */ - +#include <console/console.h> +#include <device/pci.h> +#include <string.h> +#include <stdint.h> #include <arch/pirq_routing.h> -const struct irq_routing_table intel_irq_routing_table = { - PIRQ_SIGNATURE, /* u32 signature */ - PIRQ_VERSION, /* u16 version */ - 32+16*11, /* there can be total 11 devices on the bus */ - 3, /* Where the interrupt router lies (bus) */ - (4<<3)|3, /* Where the interrupt router lies (dev) */ - 0, /* IRQs devoted exclusively to PCI usage */ - 0x1022, /* Vendor */ - 0x746b, /* Device */ - 0, /* Crap (miniport) */ - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0x42, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ - { - {3,(4<<3)|0, {{0x1, 0xdef8}, {0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}}, 0, 0}, - {0x6,0, {{0, 0}, {0, 0}, {0, 0}, {0x4, 0xdef8}}, 0, 0}, - {0x1,0, {{0x1, 0xdef8}, {0x2, 0xdef8}, {0, 0}, {0, 0}}, 0x0, 0}, - {0x5,(3<<3)|0, {{0x1, 0xdef8}, {0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}}, 0x1, 0}, - {0x5,(6<<3)|0, {{0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}}, 0x2, 0}, - {0x4,(8<<3)|0, {{0x4, 0xdef8}, {0x1, 0xdef8}, {0x2, 0xdef8}, {0x3, 0xdef8}}, 0x3, 0}, - {0x4,(7<<3)|0, {{0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}, {0x2, 0xdef8}}, 0x4, 0}, - {0x6,(0x0a<<3)|0, {{0x1, 0xdef8}, {0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}}, 0x5, 0}, - {0x4,(9<<3)|0, {{0x1, 0xdef8}, {2, 0xdef8}, {0, 0}, {0, 0}}, 0, 0}, - {0x6,(0x0b<<3)|0, {{0x2, 0xdef8}, {0, 0}, {0, 0}, {0, 0}}, 0, 0}, - {0x6,(0x0c<<3)|0, {{0x4, 0xdef8}, {0, 0}, {0, 0}, {0, 0}}, 0, 0}, - } -}; +static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, + uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3, + uint8_t slot, uint8_t rfu) +{ + pirq_info->bus = bus; + pirq_info->devfn = devfn; + pirq_info->irq[0].link = link0; + pirq_info->irq[0].bitmap = bitmap0; + pirq_info->irq[1].link = link1; + pirq_info->irq[1].bitmap = bitmap1; + pirq_info->irq[2].link = link2; + pirq_info->irq[2].bitmap = bitmap2; + pirq_info->irq[3].link = link3; + pirq_info->irq[3].bitmap = bitmap3; + pirq_info->slot = slot; + pirq_info->rfu = rfu; +} + +extern unsigned char bus_8131_0; +extern unsigned char bus_8131_1; +extern unsigned char bus_8131_2; +extern unsigned char bus_8111_0; +extern unsigned char bus_8111_1; +extern unsigned char bus_8151_0; +extern unsigned char bus_8151_1; + +extern unsigned sbdn; +extern unsigned hcdn[]; +extern unsigned sbdn3; +extern unsigned sbdn5; + +extern void get_bus_conf(void); + unsigned long write_pirq_routing_table(unsigned long addr) { - return copy_pirq_routing_table(addr); + + struct irq_routing_table *pirq; + struct irq_info *pirq_info; + unsigned slot_num; + uint8_t *v; + + uint8_t sum=0; + int i; + + get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c + + /* Align the table to be 16 byte aligned. */ + addr += 15; + addr &= ~15; + + /* This table must be betweeen 0xf0000 & 0x100000 */ + printk_info("Writing IRQ routing tables to 0x%x...", addr); + + pirq = (void *)(addr); + v = (uint8_t *)(addr); + + pirq->signature = PIRQ_SIGNATURE; + pirq->version = PIRQ_VERSION; + + pirq->rtr_bus = bus_8111_0; + pirq->rtr_devfn = ((sbdn+1)<<3)|0; + + pirq->exclusive_irqs = 0; + + pirq->rtr_vendor = 0x1022; + pirq->rtr_device = 0x746b; + + pirq->miniport_data = 0; + + memset(pirq->rfu, 0, sizeof(pirq->rfu)); + + pirq_info = (void *) ( &pirq->checksum + 1); + slot_num = 0; +//pci bridge + write_pirq_info(pirq_info, bus_8111_0, ((sbdn+1)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); + pirq_info++; slot_num++; +//pcix bridge +// write_pirq_info(pirq_info, bus_8131_0, (sbdn3<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); +// pirq_info++; slot_num++; +//agp bridge + write_pirq_info(pirq_info, bus_8151_0, (sbdn5<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); + + pirq_info++; slot_num++; + + pirq->size = 32 + 16 * slot_num; + + for (i = 0; i < pirq->size; i++) + sum += v[i]; + + sum = pirq->checksum - sum; + + if (sum != pirq->checksum) { + pirq->checksum = sum; + } + + printk_info("done.\n"); + + return (unsigned long) pirq_info; + } diff --git a/src/mainboard/tyan/s2885/mptable.c b/src/mainboard/tyan/s2885/mptable.c index a9683d577c..83cbaf0e18 100644 --- a/src/mainboard/tyan/s2885/mptable.c +++ b/src/mainboard/tyan/s2885/mptable.c @@ -3,44 +3,25 @@ #include <device/pci.h> #include <string.h> #include <stdint.h> -#if CONFIG_LOGICAL_CPUS==1 -#include <cpu/amd/dualcore.h> -#endif +extern unsigned char bus_isa; +extern unsigned char bus_8131_0; +extern unsigned char bus_8131_1; +extern unsigned char bus_8131_2; +extern unsigned char bus_8111_0; +extern unsigned char bus_8111_1; +extern unsigned char bus_8151_0; +extern unsigned char bus_8151_1; +extern unsigned apicid_8111; +extern unsigned apicid_8131_1; +extern unsigned apicid_8131_2; -static unsigned node_link_to_bus(unsigned node, unsigned link) -{ - device_t dev; - unsigned reg; +extern unsigned sbdn; +extern unsigned hcdn[]; +extern unsigned sbdn3; +extern unsigned sbdn5; - dev = dev_find_slot(0, PCI_DEVFN(0x18, 1)); - if (!dev) { - return 0; - } - for(reg = 0xE0; reg < 0xF0; reg += 0x04) { - uint32_t config_map; - unsigned dst_node; - unsigned dst_link; - unsigned bus_base; - config_map = pci_read_config32(dev, reg); - if ((config_map & 3) != 3) { - continue; - } - dst_node = (config_map >> 4) & 7; - dst_link = (config_map >> 8) & 3; - bus_base = (config_map >> 16) & 0xff; -#if 0 - printk_debug("node.link=bus: %d.%d=%d 0x%2x->0x%08x\n", - dst_node, dst_link, bus_base, - reg, config_map); -#endif - if ((dst_node == node) && (dst_link == link)) - { - return bus_base; - } - } - return 0; -} +extern void get_bus_conf(void); void *smp_write_config_table(void *v) @@ -51,18 +32,7 @@ void *smp_write_config_table(void *v) struct mp_config_table *mc; unsigned char bus_num; - unsigned char bus_isa; - unsigned char bus_8131_0; - unsigned char bus_8131_1; - unsigned char bus_8131_2; - unsigned char bus_8111_0; - unsigned char bus_8111_1; - unsigned char bus_8151_0; - unsigned char bus_8151_1; - unsigned apicid_base; - unsigned apicid_8111; - unsigned apicid_8131_1; - unsigned apicid_8131_2; + int i; mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); @@ -84,71 +54,7 @@ void *smp_write_config_table(void *v) smp_write_processors(mc); - { - device_t dev; - - /* HT chain 0 */ - bus_8151_0 = node_link_to_bus(0, 0); - if (bus_8151_0 == 0) { - printk_debug("ERROR - cound not find bus for node 0 chain 0, using defaults\n"); - bus_8151_0 = 1; - } - /* 8151 */ - dev = dev_find_slot(bus_8151_0, PCI_DEVFN(0x02,0)); - if (dev) { - bus_8151_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); -// printk_debug("bus_8151_1=%d\n",bus_8151_1); - bus_8111_0 = pci_read_config8(dev, PCI_SUBORDINATE_BUS); - bus_8111_0++; - bus_8131_0 = bus_8111_0; -// printk_debug("bus_8111_0=%d\n",bus_8111_0); - } - else { - printk_debug("ERROR - could not find PCI 1:02.0, using defaults\n"); - bus_8151_1 = 2; - bus_8111_0 = bus_8131_0 = 3; - } - - /* 8111 */ - dev = dev_find_slot(bus_8111_0, PCI_DEVFN(0x03,0)); - if (dev) { - bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); - bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS); - bus_isa++; -// printk_debug("bus_isa=%d\n",bus_isa); - } - else { - printk_debug("ERROR - could not find PCI %02x:03.0, using defaults\n", bus_8111_0); - - bus_8111_1 = 6; - bus_isa = 7; - } - /* 8131-1 */ - dev = dev_find_slot(bus_8131_0, PCI_DEVFN(0x01,0)); - if (dev) { - bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); - - } - else { - printk_debug("ERROR - could not find PCI %02x:01.0, using defaults\n", bus_8131_0); - - bus_8131_1 = 4; - } - /* 8131-2 */ - dev = dev_find_slot(bus_8131_0, PCI_DEVFN(0x02,0)); - if (dev) { - bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS); - - } - else { - printk_debug("ERROR - could not find PCI %02x:02.0, using defaults\n", bus_8131_0); - - bus_8131_2 = 5; - } - - } - - + get_bus_conf(); /*Bus: Bus ID Type*/ /* define bus and isa numbers */ @@ -158,26 +64,18 @@ void *smp_write_config_table(void *v) smp_write_bus(mc, bus_isa, "ISA "); /*I/O APICs: APIC ID Version State Address*/ -#if CONFIG_LOGICAL_CPUS==1 - apicid_base = get_apicid_base(3); -#else - apicid_base = CONFIG_MAX_PHYSICAL_CPUS; -#endif - apicid_8111 = apicid_base+0; - apicid_8131_1 = apicid_base+1; - apicid_8131_2 = apicid_base+2; smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000); //8111 { device_t dev; struct resource *res; - dev = dev_find_slot(bus_8131_0, PCI_DEVFN(0x1,1)); + dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,1)); if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { smp_write_ioapic(mc, apicid_8131_1, 0x11, res->base); } } - dev = dev_find_slot(bus_8131_0, PCI_DEVFN(0x2,1)); + dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,1)); if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { @@ -201,9 +99,9 @@ void *smp_write_config_table(void *v) smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xe, apicid_8111, 0xe); smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xf, apicid_8111, 0xf); //??? What - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, (4<<2)|3, apicid_8111, 0x13); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, ((sbdn+1)<<2)|3, apicid_8111, 0x13); //Onboard AMD AC97 Audio - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, (4<<2)|1, apicid_8111, 0x11); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, ((sbdn+1)<<2)|1, apicid_8111, 0x11); // Onboard AMD USB smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0<<2)|3, apicid_8111, 0x13); @@ -218,34 +116,33 @@ void *smp_write_config_table(void *v) smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (9<<2)|0, apicid_8131_1, 0x0); //Slot 5 PCI 32 - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0a<<2)|0, apicid_8111, 0x10); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0a<<2)|1, apicid_8111, 0x11); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0a<<2)|2, apicid_8111, 0x12); // - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0a<<2)|3, apicid_8111, 0x13); // + for(i=0;i<4;i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0a<<2)|i, apicid_8111, 0x10 + (0+i)%4); //16 + } + //Slot 3 PCIX 100/66 - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (8<<2)|0, apicid_8131_1, 0x3); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (8<<2)|1, apicid_8131_1, 0x0); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (8<<2)|2, apicid_8131_1, 0x1);// - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (8<<2)|3, apicid_8131_1, 0x2);// + for(i=0;i<4;i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (8<<2)|i, apicid_8131_1, (3+i)%4); //27 + } + //Slot 4 PCIX 100/66 - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (7<<2)|0, apicid_8131_1, 0x2); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (7<<2)|1, apicid_8131_1, 0x3);// - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (7<<2)|2, apicid_8131_1, 0x0);// - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (7<<2)|3, apicid_8131_1, 0x1);// + for(i=0;i<4;i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (7<<2)|i, apicid_8131_1, (2+i)%4); //26 + } + //Slot 1 PCI-X 133/100/66 - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (3<<2)|0, apicid_8131_2, 0x0); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (3<<2)|1, apicid_8131_2, 0x1); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (3<<2)|2, apicid_8131_2, 0x2); // - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (3<<2)|3, apicid_8131_2, 0x3); // + for(i=0;i<4;i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (3<<2)|i, apicid_8131_2, (0+i)%4); //28 + } + //Slot 2 PCI-X 133/100/66 - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (6<<2)|0, apicid_8131_2, 0x1); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (6<<2)|1, apicid_8131_2, 0x2); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (6<<2)|2, apicid_8131_2, 0x3);// - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (6<<2)|3, apicid_8131_2, 0x0);// + for(i=0;i<4;i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (6<<2)|i, apicid_8131_2, (1+i)%4); //29 + } /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/ smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0); |