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path: root/src/mainboard/tyan/s2885/romstage.c
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Diffstat (limited to 'src/mainboard/tyan/s2885/romstage.c')
-rw-r--r--src/mainboard/tyan/s2885/romstage.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/tyan/s2885/romstage.c b/src/mainboard/tyan/s2885/romstage.c
index 7513c14e1b..f7ea579f6e 100644
--- a/src/mainboard/tyan/s2885/romstage.c
+++ b/src/mainboard/tyan/s2885/romstage.c
@@ -1,4 +1,4 @@
-
+
#include <stdint.h>
#include <string.h>
#include <device/pci_def.h>
@@ -71,7 +71,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "lib/generic_sdram.c"
/* tyan does not want the default */
-#include "resourcemap.c"
+#include "resourcemap.c"
#if CONFIG_LOGICAL_CPUS==1
#define SET_NB_CFG_54 1
@@ -119,13 +119,13 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
// post_code(0x32);
-
+
w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
uart_init();
console_init();
// dump_mem(CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE-0x200, CONFIG_DCACHE_RAM_BASE+CONFIG_DCACHE_RAM_SIZE);
-
+
/* Halt if there was a built in self test failure */
report_bist_failure(bist);