diff options
Diffstat (limited to 'src/mainboard/tyan/s2882')
-rw-r--r-- | src/mainboard/tyan/s2882/romstage.c | 15 |
1 files changed, 1 insertions, 14 deletions
diff --git a/src/mainboard/tyan/s2882/romstage.c b/src/mainboard/tyan/s2882/romstage.c index c17bc1376c..cfcc7a9ae5 100644 --- a/src/mainboard/tyan/s2882/romstage.c +++ b/src/mainboard/tyan/s2882/romstage.c @@ -10,28 +10,23 @@ #include <console/console.h> #include <lib.h> #include <spd.h> - #include <cpu/amd/model_fxx_rev.h> #include "northbridge/amd/amdk8/incoherent_ht.c" #include "southbridge/amd/amd8111/amd8111_early_smbus.c" #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" - #include "cpu/x86/lapic/boot_cpu.c" #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c" - #include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/bist.h" - #include "northbridge/amd/amdk8/setup_resource_map.c" +#include "southbridge/amd/amd8111/amd8111_early_ctrl.c" #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) -#include "southbridge/amd/amd8111/amd8111_early_ctrl.c" - static void memreset_setup(void) { if (is_cpu_pre_c0()) { @@ -62,18 +57,13 @@ static inline int spd_read_byte(unsigned device, unsigned address) return smbus_read_byte(device, address); } - #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/resourcemap.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "lib/generic_sdram.c" - #include "cpu/amd/dualcore/dualcore.c" - #include "cpu/amd/car/post_cache_as_ram.c" - #include "cpu/amd/model_fxx/init_cpus.c" - #include "southbridge/amd/amd8111/amd8111_enable_rom.c" #include "northbridge/amd/amdk8/early_ht.c" @@ -117,7 +107,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) init_cpus(cpu_init_detectedx); } - w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); uart_init(); console_init(); @@ -147,6 +136,4 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sdram_initialize(ARRAY_SIZE(cpu), cpu); post_cache_as_ram(); - } - |