aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/tyan/s2882/auto.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/mainboard/tyan/s2882/auto.c')
-rw-r--r--src/mainboard/tyan/s2882/auto.c26
1 files changed, 15 insertions, 11 deletions
diff --git a/src/mainboard/tyan/s2882/auto.c b/src/mainboard/tyan/s2882/auto.c
index 4809f309c5..fe731c96ac 100644
--- a/src/mainboard/tyan/s2882/auto.c
+++ b/src/mainboard/tyan/s2882/auto.c
@@ -17,23 +17,27 @@
#include "debug.c"
#include "northbridge/amd/amdk8/cpu_rev.c"
-
+#define REV_B_RESET 0
static void memreset_setup(void)
{
- /* Set the memreset low */
-// outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 28);
- /* Ensure the BIOS has control of the memory lines */
-// outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 29);
+#if REV_B_RESET==1
+ outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 16); //REVC_MEMRST_EN=0
+#else
+ outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 16); //REVC_MEMRST_EN=1
+#endif
+ outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 17);
}
static void memreset(int controllers, const struct mem_controller *ctrl)
{
- udelay(800);
- /* Set memreset_high */
-// outb((0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 28);
- udelay(90);
+ udelay(800);
+#if REV_B_RESET==1
+ outb((0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 17); //REVB_MEMRST_L=1
+#endif
+ udelay(90);
}
+
static unsigned int generate_row(uint8_t node, uint8_t row, uint8_t maxnodes)
{
/* Routing Table Node i
@@ -80,9 +84,9 @@ static unsigned int generate_row(uint8_t node, uint8_t row, uint8_t maxnodes)
static inline void activate_spd_rom(const struct mem_controller *ctrl)
{
- /* nothing to do */
+ /* nothing to do */
}
-
+
static inline int spd_read_byte(unsigned device, unsigned address)
{
return smbus_read_byte(device, address);