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-rw-r--r--src/mainboard/tyan/s2881/get_bus_conf.c4
-rw-r--r--src/mainboard/tyan/s2881/romstage.c2
2 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/tyan/s2881/get_bus_conf.c b/src/mainboard/tyan/s2881/get_bus_conf.c
index e4721ce42e..c7b62c768d 100644
--- a/src/mainboard/tyan/s2881/get_bus_conf.c
+++ b/src/mainboard/tyan/s2881/get_bus_conf.c
@@ -3,7 +3,7 @@
#include <device/pci_ids.h>
#include <string.h>
#include <stdint.h>
-#if CONFIG_LOGICAL_CPUS==1
+#if CONFIG_LOGICAL_CPUS
#include <cpu/amd/multicore.h>
#endif
@@ -106,7 +106,7 @@ void get_bus_conf(void)
/*I/O APICs: APIC ID Version State Address*/
-#if CONFIG_LOGICAL_CPUS==1
+#if CONFIG_LOGICAL_CPUS
apicid_base = get_apicid_base(3);
#else
apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
diff --git a/src/mainboard/tyan/s2881/romstage.c b/src/mainboard/tyan/s2881/romstage.c
index bba4c7e5d8..07ac12b6d0 100644
--- a/src/mainboard/tyan/s2881/romstage.c
+++ b/src/mainboard/tyan/s2881/romstage.c
@@ -92,7 +92,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
needs_reset = setup_coherent_ht_domain();
wait_all_core0_started();
-#if CONFIG_LOGICAL_CPUS==1
+#if CONFIG_LOGICAL_CPUS
// It is said that we should start core1 after all core0 launched
start_other_cores();
wait_all_other_cores_started(bsp_apicid);